| 1 |
/* arch/arm/mach-msm/qdsp5/adsp.c |
| 2 |
* |
| 3 |
* Register/Interrupt access for userspace aDSP library. |
| 4 |
* |
| 5 |
* Copyright (c) 2008 QUALCOMM Incorporated |
| 6 |
* Copyright (C) 2008 Google, Inc. |
| 7 |
* Author: Iliyan Malchev <ibm@android.com> |
| 8 |
* |
| 9 |
* This software is licensed under the terms of the GNU General Public |
| 10 |
* License version 2, as published by the Free Software Foundation, and |
| 11 |
* may be copied, distributed, and modified under those terms. |
| 12 |
* |
| 13 |
* This program is distributed in the hope that it will be useful, |
| 14 |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 |
* GNU General Public License for more details. |
| 17 |
* |
| 18 |
*/ |
| 19 |
|
| 20 |
/* TODO: |
| 21 |
* - move shareable rpc code outside of adsp.c |
| 22 |
* - general solution for virt->phys patchup |
| 23 |
* - queue IDs should be relative to modules |
| 24 |
* - disallow access to non-associated queues |
| 25 |
*/ |
| 26 |
|
| 27 |
#include <linux/clk.h> |
| 28 |
#include <linux/delay.h> |
| 29 |
#include <linux/interrupt.h> |
| 30 |
#include <linux/kernel.h> |
| 31 |
#include <linux/kthread.h> |
| 32 |
#include <linux/module.h> |
| 33 |
#include <linux/uaccess.h> |
| 34 |
#include <linux/wait.h> |
| 35 |
#include <linux/wakelock.h> |
| 36 |
#include <asm/mach-types.h> |
| 37 |
#include "../smd_rpcrouter.h" |
| 38 |
#include <mach/amss_para.h> |
| 39 |
|
| 40 |
static struct wake_lock adsp_wake_lock; |
| 41 |
static inline void prevent_suspend(void) |
| 42 |
{ |
| 43 |
wake_lock(&adsp_wake_lock); |
| 44 |
} |
| 45 |
static inline void allow_suspend(void) |
| 46 |
{ |
| 47 |
wake_unlock(&adsp_wake_lock); |
| 48 |
} |
| 49 |
|
| 50 |
#include <linux/io.h> |
| 51 |
#include <mach/msm_iomap.h> |
| 52 |
#include <../smd_private.h> |
| 53 |
#include "adsp.h" |
| 54 |
|
| 55 |
uint32_t int_adsp = 0; |
| 56 |
#define RPC_ADSP_RTOS_ATOM_PROG 0x3000000a |
| 57 |
#define RPC_ADSP_RTOS_MTOA_PROG 0x3000000b |
| 58 |
|
| 59 |
|
| 60 |
|
| 61 |
static unsigned adsp_cid=0xfadefade; // we must register this cid early in smd init |
| 62 |
// don't know why it won't work if you register later. |
| 63 |
|
| 64 |
static struct adsp_info adsp_info; |
| 65 |
static struct msm_rpc_endpoint *rpc_cb_server_client; |
| 66 |
static struct msm_adsp_module *adsp_modules; |
| 67 |
static int adsp_open_count; |
| 68 |
static DEFINE_MUTEX(adsp_open_lock); |
| 69 |
|
| 70 |
/* protect interactions with the ADSP command/message queue */ |
| 71 |
static spinlock_t adsp_cmd_lock; |
| 72 |
|
| 73 |
static uint32_t current_image = -1; |
| 74 |
|
| 75 |
void adsp_set_image(struct adsp_info *info, uint32_t image) |
| 76 |
{ |
| 77 |
current_image = image; |
| 78 |
} |
| 79 |
|
| 80 |
uint32_t adsp_get_module(struct adsp_info *info, uint32_t task) |
| 81 |
{ |
| 82 |
return info->task_to_module[current_image][task]; |
| 83 |
} |
| 84 |
|
| 85 |
uint32_t adsp_get_queue_offset(struct adsp_info *info, uint32_t queue_id) |
| 86 |
{ |
| 87 |
return info->queue_offset[current_image][queue_id]; |
| 88 |
} |
| 89 |
|
| 90 |
static int rpc_adsp_rtos_app_to_modem(uint32_t cmd, uint32_t module, |
| 91 |
struct msm_adsp_module *adsp_module) |
| 92 |
{ |
| 93 |
int rc; |
| 94 |
struct rpc_adsp_rtos_app_to_modem_args_t rpc_req; |
| 95 |
struct rpc_reply_hdr *rpc_rsp; |
| 96 |
|
| 97 |
msm_rpc_setup_req(&rpc_req.hdr, |
| 98 |
RPC_ADSP_RTOS_ATOM_PROG, |
| 99 |
amss_get_num_value(RPC_ADSP_RTOS_ATOM_VERS), |
| 100 |
amss_get_num_value(RPC_ADSP_RTOS_APP_TO_MODEM_PROC)); |
| 101 |
|
| 102 |
rpc_req.gotit = cpu_to_be32(1); |
| 103 |
rpc_req.cmd = cpu_to_be32(cmd); |
| 104 |
rpc_req.proc_id = cpu_to_be32(RPC_ADSP_RTOS_PROC_APPS); |
| 105 |
rpc_req.module = cpu_to_be32(module); |
| 106 |
rc = msm_rpc_write(adsp_module->rpc_client, &rpc_req, sizeof(rpc_req)); |
| 107 |
if (rc < 0) { |
| 108 |
pr_err("adsp: could not send RPC request: %d\n", rc); |
| 109 |
return rc; |
| 110 |
} |
| 111 |
|
| 112 |
rc = msm_rpc_read(adsp_module->rpc_client, |
| 113 |
(void **)&rpc_rsp, -1, (5*HZ)); |
| 114 |
if (rc < 0) { |
| 115 |
pr_err("adsp: error receiving RPC reply: %d (%d)\n", |
| 116 |
rc, -ERESTARTSYS); |
| 117 |
return rc; |
| 118 |
} |
| 119 |
|
| 120 |
if (be32_to_cpu(rpc_rsp->reply_stat) != RPCMSG_REPLYSTAT_ACCEPTED) { |
| 121 |
pr_err("adsp: RPC call was denied!\n"); |
| 122 |
kfree(rpc_rsp); |
| 123 |
return -EPERM; |
| 124 |
} |
| 125 |
|
| 126 |
if (be32_to_cpu(rpc_rsp->data.acc_hdr.accept_stat) != |
| 127 |
RPC_ACCEPTSTAT_SUCCESS) { |
| 128 |
pr_err("adsp error: RPC call was not successful (%d)\n", |
| 129 |
be32_to_cpu(rpc_rsp->data.acc_hdr.accept_stat)); |
| 130 |
kfree(rpc_rsp); |
| 131 |
return -EINVAL; |
| 132 |
} |
| 133 |
|
| 134 |
kfree(rpc_rsp); |
| 135 |
return 0; |
| 136 |
} |
| 137 |
|
| 138 |
struct msm_adsp_module *find_adsp_module_by_id( |
| 139 |
struct adsp_info *info, uint32_t id) |
| 140 |
{ |
| 141 |
if (id > info->max_module_id) |
| 142 |
return NULL; |
| 143 |
else |
| 144 |
return info->id_to_module[id]; |
| 145 |
} |
| 146 |
|
| 147 |
static struct msm_adsp_module *find_adsp_module_by_name( |
| 148 |
struct adsp_info *info, const char *name) |
| 149 |
{ |
| 150 |
unsigned n; |
| 151 |
for (n = 0; n < info->module_count; n++) |
| 152 |
if (!strcmp(name, adsp_modules[n].name)) |
| 153 |
return adsp_modules + n; |
| 154 |
return NULL; |
| 155 |
} |
| 156 |
|
| 157 |
static int adsp_rpc_init(struct msm_adsp_module *adsp_module) |
| 158 |
{ |
| 159 |
adsp_module->rpc_client = msm_rpc_connect( |
| 160 |
RPC_ADSP_RTOS_ATOM_PROG, |
| 161 |
amss_get_num_value(RPC_ADSP_RTOS_ATOM_VERS), |
| 162 |
MSM_RPC_UNINTERRUPTIBLE); |
| 163 |
|
| 164 |
if (IS_ERR(adsp_module->rpc_client)) { |
| 165 |
int rc = PTR_ERR(adsp_module->rpc_client); |
| 166 |
adsp_module->rpc_client = 0; |
| 167 |
pr_err("adsp: could not open rpc client: %d\n", rc); |
| 168 |
return rc; |
| 169 |
} |
| 170 |
|
| 171 |
return 0; |
| 172 |
} |
| 173 |
|
| 174 |
int msm_adsp_get(const char *name, struct msm_adsp_module **out, |
| 175 |
struct msm_adsp_ops *ops, void *driver_data) |
| 176 |
{ |
| 177 |
struct msm_adsp_module *module; |
| 178 |
int rc = 0; |
| 179 |
|
| 180 |
module = find_adsp_module_by_name(&adsp_info, name); |
| 181 |
if (!module) { |
| 182 |
pr_err("adsp: cannot find module \n"); |
| 183 |
return -ENODEV; |
| 184 |
} |
| 185 |
|
| 186 |
mutex_lock(&module->lock); |
| 187 |
pr_info("adsp: opening module %s\n", module->name); |
| 188 |
if (module->open_count++ == 0 && module->clk) |
| 189 |
clk_enable(module->clk); |
| 190 |
|
| 191 |
mutex_lock(&adsp_open_lock); |
| 192 |
if (adsp_open_count++ == 0) { |
| 193 |
enable_irq(int_adsp); |
| 194 |
prevent_suspend(); |
| 195 |
} |
| 196 |
mutex_unlock(&adsp_open_lock); |
| 197 |
|
| 198 |
if (module->ops) { |
| 199 |
rc = -EBUSY; |
| 200 |
goto done; |
| 201 |
} |
| 202 |
|
| 203 |
rc = adsp_rpc_init(module); |
| 204 |
if (rc) |
| 205 |
goto done; |
| 206 |
|
| 207 |
module->ops = ops; |
| 208 |
module->driver_data = driver_data; |
| 209 |
*out = module; |
| 210 |
rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_REGISTER_APP, |
| 211 |
module->id, module); |
| 212 |
if (rc) { |
| 213 |
module->ops = NULL; |
| 214 |
module->driver_data = NULL; |
| 215 |
*out = NULL; |
| 216 |
pr_err("adsp: REGISTER_APP failed\n"); |
| 217 |
goto done; |
| 218 |
} |
| 219 |
|
| 220 |
pr_info("adsp: module %s has been registered\n", module->name); |
| 221 |
|
| 222 |
done: |
| 223 |
mutex_lock(&adsp_open_lock); |
| 224 |
if (rc && --adsp_open_count == 0) { |
| 225 |
disable_irq(int_adsp); |
| 226 |
allow_suspend(); |
| 227 |
} |
| 228 |
if (rc && --module->open_count == 0 && module->clk) |
| 229 |
clk_disable(module->clk); |
| 230 |
mutex_unlock(&adsp_open_lock); |
| 231 |
mutex_unlock(&module->lock); |
| 232 |
return rc; |
| 233 |
} |
| 234 |
|
| 235 |
static int msm_adsp_disable_locked(struct msm_adsp_module *module); |
| 236 |
|
| 237 |
void msm_adsp_put(struct msm_adsp_module *module) |
| 238 |
{ |
| 239 |
unsigned long flags; |
| 240 |
|
| 241 |
mutex_lock(&module->lock); |
| 242 |
if (--module->open_count == 0 && module->clk) |
| 243 |
clk_disable(module->clk); |
| 244 |
if (module->ops) { |
| 245 |
pr_info("adsp: closing module %s\n", module->name); |
| 246 |
|
| 247 |
/* lock to ensure a dsp event cannot be delivered |
| 248 |
* during or after removal of the ops and driver_data |
| 249 |
*/ |
| 250 |
spin_lock_irqsave(&adsp_cmd_lock, flags); |
| 251 |
module->ops = NULL; |
| 252 |
module->driver_data = NULL; |
| 253 |
spin_unlock_irqrestore(&adsp_cmd_lock, flags); |
| 254 |
|
| 255 |
if (module->state != ADSP_STATE_DISABLED) { |
| 256 |
pr_info("adsp: disabling module %s\n", module->name); |
| 257 |
msm_adsp_disable_locked(module); |
| 258 |
} |
| 259 |
|
| 260 |
msm_rpc_close(module->rpc_client); |
| 261 |
module->rpc_client = 0; |
| 262 |
if (--adsp_open_count == 0) { |
| 263 |
disable_irq(int_adsp); |
| 264 |
allow_suspend(); |
| 265 |
pr_info("adsp: disable interrupt\n"); |
| 266 |
} |
| 267 |
} else { |
| 268 |
pr_info("adsp: module %s is already closed\n", module->name); |
| 269 |
} |
| 270 |
mutex_unlock(&module->lock); |
| 271 |
} |
| 272 |
|
| 273 |
/* this should be common code with rpc_servers.c */ |
| 274 |
static int rpc_send_accepted_void_reply(struct msm_rpc_endpoint *client, |
| 275 |
uint32_t xid, uint32_t accept_status) |
| 276 |
{ |
| 277 |
int rc = 0; |
| 278 |
uint8_t reply_buf[sizeof(struct rpc_reply_hdr)]; |
| 279 |
struct rpc_reply_hdr *reply = (struct rpc_reply_hdr *)reply_buf; |
| 280 |
|
| 281 |
reply->xid = cpu_to_be32(xid); |
| 282 |
reply->type = cpu_to_be32(1); /* reply */ |
| 283 |
reply->reply_stat = cpu_to_be32(RPCMSG_REPLYSTAT_ACCEPTED); |
| 284 |
|
| 285 |
reply->data.acc_hdr.accept_stat = cpu_to_be32(accept_status); |
| 286 |
reply->data.acc_hdr.verf_flavor = 0; |
| 287 |
reply->data.acc_hdr.verf_length = 0; |
| 288 |
|
| 289 |
rc = msm_rpc_write(rpc_cb_server_client, reply_buf, sizeof(reply_buf)); |
| 290 |
if (rc < 0) |
| 291 |
pr_err("adsp: could not write RPC response: %d\n", rc); |
| 292 |
return rc; |
| 293 |
} |
| 294 |
|
| 295 |
int msm_adsp_write(struct msm_adsp_module *module, unsigned dsp_queue_addr, |
| 296 |
void *cmd_buf, size_t cmd_size) |
| 297 |
{ |
| 298 |
uint32_t ctrl_word; |
| 299 |
uint32_t dsp_q_addr; |
| 300 |
uint32_t dsp_addr; |
| 301 |
uint32_t cmd_id = 0; |
| 302 |
int cnt = 0; |
| 303 |
int ret_status = 0; |
| 304 |
unsigned long flags; |
| 305 |
struct adsp_info *info = module->info; |
| 306 |
|
| 307 |
spin_lock_irqsave(&adsp_cmd_lock, flags); |
| 308 |
|
| 309 |
if (module->state != ADSP_STATE_ENABLED) { |
| 310 |
spin_unlock_irqrestore(&adsp_cmd_lock, flags); |
| 311 |
pr_err("adsp: module %s not enabled before write\n", |
| 312 |
module->name); |
| 313 |
return -ENODEV; |
| 314 |
} |
| 315 |
dsp_q_addr = adsp_get_queue_offset(info, dsp_queue_addr); |
| 316 |
dsp_q_addr &= ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M; |
| 317 |
|
| 318 |
/* Poll until the ADSP is ready to accept a command. |
| 319 |
* Wait for 100us, return error if it's not responding. |
| 320 |
* If this returns an error, we need to disable ALL modules and |
| 321 |
* then retry. |
| 322 |
*/ |
| 323 |
while (((ctrl_word = readl(info->write_ctrl)) & |
| 324 |
ADSP_RTOS_WRITE_CTRL_WORD_READY_M) != |
| 325 |
ADSP_RTOS_WRITE_CTRL_WORD_READY_V) { |
| 326 |
if (cnt > 10) { |
| 327 |
pr_err("adsp: timeout waiting for DSP write ready\n"); |
| 328 |
ret_status = -EIO; |
| 329 |
goto fail; |
| 330 |
} |
| 331 |
pr_warning("adsp: waiting for DSP write ready\n"); |
| 332 |
udelay(10); |
| 333 |
cnt++; |
| 334 |
} |
| 335 |
|
| 336 |
/* Set the mutex bits */ |
| 337 |
ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M); |
| 338 |
ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V; |
| 339 |
|
| 340 |
/* Clear the command bits */ |
| 341 |
ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_CMD_M); |
| 342 |
|
| 343 |
/* Set the queue address bits */ |
| 344 |
ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M); |
| 345 |
ctrl_word |= dsp_q_addr; |
| 346 |
|
| 347 |
writel(ctrl_word, info->write_ctrl); |
| 348 |
|
| 349 |
/* Generate an interrupt to the DSP. This notifies the DSP that |
| 350 |
* we are about to send a command on this particular queue. The |
| 351 |
* DSP will in response change its state. |
| 352 |
*/ |
| 353 |
writel(1, info->send_irq); |
| 354 |
|
| 355 |
/* Poll until the adsp responds to the interrupt; this does not |
| 356 |
* generate an interrupt from the adsp. This should happen within |
| 357 |
* 5ms. |
| 358 |
*/ |
| 359 |
cnt = 0; |
| 360 |
while ((readl(info->write_ctrl) & |
| 361 |
ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M) == |
| 362 |
ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V) { |
| 363 |
if (cnt > 5) { |
| 364 |
pr_err("adsp: timeout waiting for adsp ack\n"); |
| 365 |
ret_status = -EIO; |
| 366 |
goto fail; |
| 367 |
} |
| 368 |
mdelay(1); |
| 369 |
cnt++; |
| 370 |
} |
| 371 |
|
| 372 |
/* Read the ctrl word */ |
| 373 |
ctrl_word = readl(info->write_ctrl); |
| 374 |
|
| 375 |
if ((ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_STATUS_M) != |
| 376 |
ADSP_RTOS_WRITE_CTRL_WORD_NO_ERR_V) { |
| 377 |
ret_status = -EIO; |
| 378 |
pr_err("adsp: failed to write queue %x, retry\n", dsp_q_addr); |
| 379 |
goto fail; |
| 380 |
} else { |
| 381 |
/* No error */ |
| 382 |
/* Get the DSP buffer address */ |
| 383 |
dsp_addr = (ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M) + |
| 384 |
(uint32_t)MSM_AD5_BASE; |
| 385 |
|
| 386 |
if (dsp_addr < (uint32_t)(MSM_AD5_BASE + QDSP_RAMC_OFFSET)) { |
| 387 |
uint16_t *buf_ptr = (uint16_t *) cmd_buf; |
| 388 |
uint16_t *dsp_addr16 = (uint16_t *)dsp_addr; |
| 389 |
cmd_size /= sizeof(uint16_t); |
| 390 |
|
| 391 |
/* Save the command ID */ |
| 392 |
cmd_id = (uint32_t) buf_ptr[0]; |
| 393 |
|
| 394 |
/* Copy the command to DSP memory */ |
| 395 |
cmd_size++; |
| 396 |
while (--cmd_size) |
| 397 |
*dsp_addr16++ = *buf_ptr++; |
| 398 |
} else { |
| 399 |
uint32_t *buf_ptr = (uint32_t *) cmd_buf; |
| 400 |
uint32_t *dsp_addr32 = (uint32_t *)dsp_addr; |
| 401 |
cmd_size /= sizeof(uint32_t); |
| 402 |
|
| 403 |
/* Save the command ID */ |
| 404 |
cmd_id = buf_ptr[0]; |
| 405 |
|
| 406 |
cmd_size++; |
| 407 |
while (--cmd_size) |
| 408 |
*dsp_addr32++ = *buf_ptr++; |
| 409 |
} |
| 410 |
|
| 411 |
/* Set the mutex bits */ |
| 412 |
ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M); |
| 413 |
ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V; |
| 414 |
|
| 415 |
/* Set the command bits to write done */ |
| 416 |
ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_CMD_M); |
| 417 |
ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_CMD_WRITE_DONE_V; |
| 418 |
|
| 419 |
/* Set the queue address bits */ |
| 420 |
ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M); |
| 421 |
ctrl_word |= dsp_q_addr; |
| 422 |
|
| 423 |
writel(ctrl_word, info->write_ctrl); |
| 424 |
|
| 425 |
/* Generate an interrupt to the DSP. It does not respond with |
| 426 |
* an interrupt, and we do not need to wait for it to |
| 427 |
* acknowledge, because it will hold the mutex lock until it's |
| 428 |
* ready to receive more commands again. |
| 429 |
*/ |
| 430 |
writel(1, info->send_irq); |
| 431 |
|
| 432 |
module->num_commands++; |
| 433 |
} /* Ctrl word status bits were 00, no error in the ctrl word */ |
| 434 |
|
| 435 |
fail: |
| 436 |
spin_unlock_irqrestore(&adsp_cmd_lock, flags); |
| 437 |
return ret_status; |
| 438 |
} |
| 439 |
|
| 440 |
static void *event_addr; |
| 441 |
static void read_event(void *buf, size_t len) |
| 442 |
{ |
| 443 |
uint32_t dptr[3]; |
| 444 |
struct rpc_adsp_rtos_modem_to_app_args_t *sptr; |
| 445 |
|
| 446 |
sptr = event_addr; |
| 447 |
|
| 448 |
switch(__amss_version) { |
| 449 |
case 6125: { |
| 450 |
struct rpc_adsp_rtos_modem_to_app_args_t_6125 *args = |
| 451 |
(struct rpc_adsp_rtos_modem_to_app_args_t_6125 *)sptr; |
| 452 |
dptr[0] = be32_to_cpu(args->event); |
| 453 |
dptr[1] = be32_to_cpu(args->module); |
| 454 |
dptr[2] = be32_to_cpu(args->image); |
| 455 |
break; |
| 456 |
} |
| 457 |
default: { |
| 458 |
struct rpc_adsp_rtos_modem_to_app_args_t *args = |
| 459 |
(struct rpc_adsp_rtos_modem_to_app_args_t *)sptr; |
| 460 |
dptr[0] = be32_to_cpu(args->event); |
| 461 |
dptr[1] = be32_to_cpu(args->module); |
| 462 |
dptr[2] = be32_to_cpu(args->image); |
| 463 |
break; |
| 464 |
} |
| 465 |
} |
| 466 |
|
| 467 |
if (len > EVENT_LEN) |
| 468 |
len = EVENT_LEN; |
| 469 |
|
| 470 |
memcpy(buf, dptr, len); |
| 471 |
} |
| 472 |
|
| 473 |
static void handle_adsp_rtos_mtoa_app(struct rpc_request_hdr *req) |
| 474 |
{ |
| 475 |
uint32_t event = 0; |
| 476 |
uint32_t proc_id = 0; |
| 477 |
uint32_t module_id = 0; |
| 478 |
uint32_t image = 0; |
| 479 |
|
| 480 |
struct msm_adsp_module *module; |
| 481 |
|
| 482 |
switch(__amss_version) { |
| 483 |
case 6125: { |
| 484 |
struct rpc_adsp_rtos_modem_to_app_args_t_6125 *args = |
| 485 |
(struct rpc_adsp_rtos_modem_to_app_args_t_6125 *)req; |
| 486 |
event = be32_to_cpu(args->event); |
| 487 |
proc_id = be32_to_cpu(args->proc_id); |
| 488 |
module_id = be32_to_cpu(args->module); |
| 489 |
image = be32_to_cpu(args->image); |
| 490 |
break; |
| 491 |
} |
| 492 |
default: { |
| 493 |
struct rpc_adsp_rtos_modem_to_app_args_t *args = |
| 494 |
(struct rpc_adsp_rtos_modem_to_app_args_t *)req; |
| 495 |
event = be32_to_cpu(args->event); |
| 496 |
proc_id = be32_to_cpu(args->proc_id); |
| 497 |
module_id = be32_to_cpu(args->module); |
| 498 |
image = be32_to_cpu(args->image); |
| 499 |
break; |
| 500 |
} |
| 501 |
} |
| 502 |
|
| 503 |
pr_info("adsp: rpc event=%d, proc_id=%d, module=%d, image=%d\n", |
| 504 |
event, proc_id, module_id, image); |
| 505 |
|
| 506 |
module = find_adsp_module_by_id(&adsp_info, module_id); |
| 507 |
if (!module) { |
| 508 |
pr_err("adsp: module %d is not supported!\n", module_id); |
| 509 |
rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid, |
| 510 |
RPC_ACCEPTSTAT_GARBAGE_ARGS); |
| 511 |
return; |
| 512 |
} |
| 513 |
|
| 514 |
mutex_lock(&module->lock); |
| 515 |
switch (event) { |
| 516 |
case RPC_ADSP_RTOS_MOD_READY: |
| 517 |
pr_info("adsp: module %s: READY\n", module->name); |
| 518 |
module->state = ADSP_STATE_ENABLED; |
| 519 |
wake_up(&module->state_wait); |
| 520 |
adsp_set_image(module->info, image); |
| 521 |
break; |
| 522 |
case RPC_ADSP_RTOS_MOD_DISABLE: |
| 523 |
pr_info("adsp: module %s: DISABLED\n", module->name); |
| 524 |
module->state = ADSP_STATE_DISABLED; |
| 525 |
wake_up(&module->state_wait); |
| 526 |
break; |
| 527 |
case RPC_ADSP_RTOS_SERVICE_RESET: |
| 528 |
pr_info("adsp: module %s: SERVICE_RESET\n", module->name); |
| 529 |
module->state = ADSP_STATE_DISABLED; |
| 530 |
wake_up(&module->state_wait); |
| 531 |
break; |
| 532 |
case RPC_ADSP_RTOS_CMD_SUCCESS: |
| 533 |
pr_info("adsp: module %s: CMD_SUCCESS\n", module->name); |
| 534 |
break; |
| 535 |
case RPC_ADSP_RTOS_CMD_FAIL: |
| 536 |
pr_info("adsp: module %s: CMD_FAIL\n", module->name); |
| 537 |
break; |
| 538 |
default: |
| 539 |
pr_info("adsp: unknown event %d\n", event); |
| 540 |
rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid, |
| 541 |
RPC_ACCEPTSTAT_GARBAGE_ARGS); |
| 542 |
goto done; |
| 543 |
} |
| 544 |
rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid, |
| 545 |
RPC_ACCEPTSTAT_SUCCESS); |
| 546 |
|
| 547 |
event_addr = (uint32_t *)req; |
| 548 |
module->ops->event(module->driver_data, |
| 549 |
EVENT_MSG_ID, |
| 550 |
EVENT_LEN, |
| 551 |
read_event); |
| 552 |
|
| 553 |
done: |
| 554 |
mutex_unlock(&module->lock); |
| 555 |
} |
| 556 |
|
| 557 |
static int handle_adsp_rtos_mtoa(struct rpc_request_hdr *req) |
| 558 |
{ |
| 559 |
if(req->procedure == amss_get_num_value(RPC_ADSP_RTOS_MTOA_NULL_PROC)) { |
| 560 |
rpc_send_accepted_void_reply(rpc_cb_server_client, |
| 561 |
req->xid, |
| 562 |
RPC_ACCEPTSTAT_SUCCESS); |
| 563 |
} |
| 564 |
else if(req->procedure == amss_get_num_value(RPC_ADSP_RTOS_MODEM_TO_APP_PROC)) { |
| 565 |
handle_adsp_rtos_mtoa_app(req); |
| 566 |
} |
| 567 |
else { |
| 568 |
pr_err("adsp: unknowned proc %d\n", req->procedure); |
| 569 |
rpc_send_accepted_void_reply( |
| 570 |
rpc_cb_server_client, req->xid, |
| 571 |
RPC_ACCEPTSTAT_PROC_UNAVAIL); |
| 572 |
} |
| 573 |
return 0; |
| 574 |
} |
| 575 |
|
| 576 |
/* this should be common code with rpc_servers.c */ |
| 577 |
static int adsp_rpc_thread(void *data) |
| 578 |
{ |
| 579 |
void *buffer; |
| 580 |
struct rpc_request_hdr *req; |
| 581 |
int rc, exit = 0; |
| 582 |
|
| 583 |
do { |
| 584 |
rc = msm_rpc_read(rpc_cb_server_client, &buffer, -1, -1); |
| 585 |
if (rc < 0) { |
| 586 |
pr_err("adsp: could not read rpc: %d\n", rc); |
| 587 |
break; |
| 588 |
} |
| 589 |
req = (struct rpc_request_hdr *)buffer; |
| 590 |
|
| 591 |
req->type = be32_to_cpu(req->type); |
| 592 |
req->xid = be32_to_cpu(req->xid); |
| 593 |
req->rpc_vers = be32_to_cpu(req->rpc_vers); |
| 594 |
req->prog = be32_to_cpu(req->prog); |
| 595 |
req->vers = be32_to_cpu(req->vers); |
| 596 |
req->procedure = be32_to_cpu(req->procedure); |
| 597 |
|
| 598 |
if (req->type != 0) |
| 599 |
goto bad_rpc; |
| 600 |
if (req->rpc_vers != 2) |
| 601 |
goto bad_rpc; |
| 602 |
if (req->prog != RPC_ADSP_RTOS_MTOA_PROG) |
| 603 |
goto bad_rpc; |
| 604 |
if (req->vers != amss_get_num_value(RPC_ADSP_RTOS_MTOA_VERS)) |
| 605 |
goto bad_rpc; |
| 606 |
|
| 607 |
handle_adsp_rtos_mtoa(req); |
| 608 |
kfree(buffer); |
| 609 |
continue; |
| 610 |
|
| 611 |
bad_rpc: |
| 612 |
pr_err("adsp: bogus rpc from modem\n"); |
| 613 |
kfree(buffer); |
| 614 |
} while (!exit); |
| 615 |
do_exit(0); |
| 616 |
} |
| 617 |
|
| 618 |
static size_t read_event_len; |
| 619 |
static void *read_event_addr; |
| 620 |
|
| 621 |
static void read_event_16(void *buf, size_t size) |
| 622 |
{ |
| 623 |
uint16_t *dst = buf; |
| 624 |
uint16_t *src = read_event_addr; |
| 625 |
size_t len = size / 2; |
| 626 |
if (len > read_event_len) |
| 627 |
len = read_event_len; |
| 628 |
else if (len < read_event_len) |
| 629 |
pr_warning("%s: event bufer length too small (%d < %d)\n", |
| 630 |
__func__, len, read_event_len); |
| 631 |
while (len--) |
| 632 |
*dst++ = *src++; |
| 633 |
} |
| 634 |
|
| 635 |
static void read_event_32(void *buf, size_t size) |
| 636 |
{ |
| 637 |
uint32_t *dst = buf; |
| 638 |
uint32_t *src = read_event_addr; |
| 639 |
size_t len = size / 4; |
| 640 |
if (len > read_event_len) |
| 641 |
len = read_event_len; |
| 642 |
else if (len < read_event_len) |
| 643 |
pr_warning("%s: event bufer length too small (%d < %d)\n", |
| 644 |
__func__, len, read_event_len); |
| 645 |
while (len--) |
| 646 |
*dst++ = *src++; |
| 647 |
} |
| 648 |
|
| 649 |
static int adsp_rtos_read_ctrl_word_cmd_tast_to_h_v( |
| 650 |
struct adsp_info *info, void *dsp_addr) |
| 651 |
{ |
| 652 |
struct msm_adsp_module *module; |
| 653 |
unsigned rtos_task_id; |
| 654 |
unsigned msg_id; |
| 655 |
unsigned msg_length; |
| 656 |
void (*func)(void *, size_t); |
| 657 |
|
| 658 |
if (dsp_addr >= (void *)(MSM_AD5_BASE + QDSP_RAMC_OFFSET)) { |
| 659 |
uint32_t *dsp_addr32 = dsp_addr; |
| 660 |
uint32_t tmp = *dsp_addr32++; |
| 661 |
rtos_task_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_TASK_ID_M) >> 8; |
| 662 |
msg_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_MSG_ID_M); |
| 663 |
read_event_len = tmp >> 16; |
| 664 |
read_event_addr = dsp_addr32; |
| 665 |
msg_length = read_event_len * sizeof(uint32_t); |
| 666 |
func = read_event_32; |
| 667 |
} else { |
| 668 |
uint16_t *dsp_addr16 = dsp_addr; |
| 669 |
uint16_t tmp = *dsp_addr16++; |
| 670 |
rtos_task_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_TASK_ID_M) >> 8; |
| 671 |
msg_id = tmp & ADSP_RTOS_READ_CTRL_WORD_MSG_ID_M; |
| 672 |
read_event_len = *dsp_addr16++; |
| 673 |
read_event_addr = dsp_addr16; |
| 674 |
msg_length = read_event_len * sizeof(uint16_t); |
| 675 |
func = read_event_16; |
| 676 |
} |
| 677 |
|
| 678 |
if (rtos_task_id > info->max_task_id) { |
| 679 |
pr_err("adsp: bogus task id %d\n", rtos_task_id); |
| 680 |
return 0; |
| 681 |
} |
| 682 |
module = find_adsp_module_by_id(info, |
| 683 |
adsp_get_module(info, rtos_task_id)); |
| 684 |
|
| 685 |
if (!module) { |
| 686 |
pr_err("adsp: no module for task id %d\n", rtos_task_id); |
| 687 |
return 0; |
| 688 |
} |
| 689 |
|
| 690 |
module->num_events++; |
| 691 |
|
| 692 |
if (!module->ops) { |
| 693 |
pr_err("adsp: module %s is not open\n", module->name); |
| 694 |
return 0; |
| 695 |
} |
| 696 |
|
| 697 |
module->ops->event(module->driver_data, msg_id, msg_length, func); |
| 698 |
return 0; |
| 699 |
} |
| 700 |
|
| 701 |
static int adsp_get_event(struct adsp_info *info) |
| 702 |
{ |
| 703 |
uint32_t ctrl_word; |
| 704 |
uint32_t ready; |
| 705 |
void *dsp_addr; |
| 706 |
uint32_t cmd_type; |
| 707 |
int cnt; |
| 708 |
unsigned long flags; |
| 709 |
int rc = 0; |
| 710 |
|
| 711 |
spin_lock_irqsave(&adsp_cmd_lock, flags); |
| 712 |
|
| 713 |
/* Whenever the DSP has a message, it updates this control word |
| 714 |
* and generates an interrupt. When we receive the interrupt, we |
| 715 |
* read this register to find out what ADSP task the command is |
| 716 |
* comming from. |
| 717 |
* |
| 718 |
* The ADSP should *always* be ready on the first call, but the |
| 719 |
* irq handler calls us in a loop (to handle back-to-back command |
| 720 |
* processing), so we give the DSP some time to return to the |
| 721 |
* ready state. The DSP will not issue another IRQ for events |
| 722 |
* pending between the first IRQ and the event queue being drained, |
| 723 |
* unfortunately. |
| 724 |
*/ |
| 725 |
|
| 726 |
for (cnt = 0; cnt < 10; cnt++) { |
| 727 |
ctrl_word = readl(info->read_ctrl); |
| 728 |
|
| 729 |
if ((ctrl_word & ADSP_RTOS_READ_CTRL_WORD_FLAG_M) == |
| 730 |
ADSP_RTOS_READ_CTRL_WORD_FLAG_UP_CONT_V) |
| 731 |
goto ready; |
| 732 |
|
| 733 |
udelay(10); |
| 734 |
} |
| 735 |
pr_warning("adsp: not ready after 100uS\n"); |
| 736 |
rc = -EBUSY; |
| 737 |
goto done; |
| 738 |
|
| 739 |
ready: |
| 740 |
/* Here we check to see if there are pending messages. If there are |
| 741 |
* none, we siply return -EAGAIN to indicate that there are no more |
| 742 |
* messages pending. |
| 743 |
*/ |
| 744 |
ready = ctrl_word & ADSP_RTOS_READ_CTRL_WORD_READY_M; |
| 745 |
if ((ready != ADSP_RTOS_READ_CTRL_WORD_READY_V) && |
| 746 |
(ready != ADSP_RTOS_READ_CTRL_WORD_CONT_V)) { |
| 747 |
rc = -EAGAIN; |
| 748 |
goto done; |
| 749 |
} |
| 750 |
|
| 751 |
/* DSP says that there are messages waiting for the host to read */ |
| 752 |
|
| 753 |
/* Get the Command Type */ |
| 754 |
cmd_type = ctrl_word & ADSP_RTOS_READ_CTRL_WORD_CMD_TYPE_M; |
| 755 |
|
| 756 |
/* Get the DSP buffer address */ |
| 757 |
dsp_addr = (void *)((ctrl_word & |
| 758 |
ADSP_RTOS_READ_CTRL_WORD_DSP_ADDR_M) + |
| 759 |
(uint32_t)MSM_AD5_BASE); |
| 760 |
|
| 761 |
/* We can only handle Task-to-Host messages */ |
| 762 |
if (cmd_type != ADSP_RTOS_READ_CTRL_WORD_CMD_TASK_TO_H_V) { |
| 763 |
pr_err("adsp: unknown dsp cmd_type %d\n", cmd_type); |
| 764 |
rc = -EIO; |
| 765 |
goto done; |
| 766 |
} |
| 767 |
|
| 768 |
adsp_rtos_read_ctrl_word_cmd_tast_to_h_v(info, dsp_addr); |
| 769 |
|
| 770 |
ctrl_word = readl(info->read_ctrl); |
| 771 |
ctrl_word &= ~ADSP_RTOS_READ_CTRL_WORD_READY_M; |
| 772 |
|
| 773 |
/* Write ctrl word to the DSP */ |
| 774 |
writel(ctrl_word, info->read_ctrl); |
| 775 |
|
| 776 |
/* Generate an interrupt to the DSP */ |
| 777 |
writel(1, info->send_irq); |
| 778 |
|
| 779 |
done: |
| 780 |
spin_unlock_irqrestore(&adsp_cmd_lock, flags); |
| 781 |
return rc; |
| 782 |
} |
| 783 |
|
| 784 |
static irqreturn_t adsp_irq_handler(int irq, void *data) |
| 785 |
{ |
| 786 |
struct adsp_info *info = &adsp_info; |
| 787 |
int cnt = 0; |
| 788 |
for (cnt = 0; cnt < 10; cnt++) |
| 789 |
if (adsp_get_event(info) < 0) |
| 790 |
break; |
| 791 |
if (cnt > info->event_backlog_max) |
| 792 |
info->event_backlog_max = cnt; |
| 793 |
info->events_received += cnt; |
| 794 |
if (cnt == 10) |
| 795 |
pr_err("adsp: too many (%d) events for single irq!\n", cnt); |
| 796 |
return IRQ_HANDLED; |
| 797 |
} |
| 798 |
|
| 799 |
int msm_adsp_enable(struct msm_adsp_module *module) |
| 800 |
{ |
| 801 |
int rc = 0; |
| 802 |
|
| 803 |
pr_info("msm_adsp_enable() '%s'\n", module->name); |
| 804 |
|
| 805 |
mutex_lock(&module->lock); |
| 806 |
switch (module->state) { |
| 807 |
case ADSP_STATE_DISABLED: |
| 808 |
rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_ENABLE, |
| 809 |
module->id, module); |
| 810 |
if (rc) |
| 811 |
break; |
| 812 |
module->state = ADSP_STATE_ENABLING; |
| 813 |
mutex_unlock(&module->lock); |
| 814 |
rc = wait_event_timeout(module->state_wait, |
| 815 |
module->state != ADSP_STATE_ENABLING, |
| 816 |
1 * HZ); |
| 817 |
mutex_lock(&module->lock); |
| 818 |
if (module->state == ADSP_STATE_ENABLED) { |
| 819 |
rc = 0; |
| 820 |
} else { |
| 821 |
pr_err("adsp: module '%s' enable timed out\n", |
| 822 |
module->name); |
| 823 |
rc = -ETIMEDOUT; |
| 824 |
} |
| 825 |
break; |
| 826 |
case ADSP_STATE_ENABLING: |
| 827 |
pr_warning("adsp: module '%s' enable in progress\n", |
| 828 |
module->name); |
| 829 |
break; |
| 830 |
case ADSP_STATE_ENABLED: |
| 831 |
pr_warning("adsp: module '%s' already enabled\n", |
| 832 |
module->name); |
| 833 |
break; |
| 834 |
case ADSP_STATE_DISABLING: |
| 835 |
pr_err("adsp: module '%s' disable in progress\n", |
| 836 |
module->name); |
| 837 |
rc = -EBUSY; |
| 838 |
break; |
| 839 |
} |
| 840 |
mutex_unlock(&module->lock); |
| 841 |
return rc; |
| 842 |
} |
| 843 |
|
| 844 |
static int msm_adsp_disable_locked(struct msm_adsp_module *module) |
| 845 |
{ |
| 846 |
int rc = 0; |
| 847 |
|
| 848 |
switch (module->state) { |
| 849 |
case ADSP_STATE_DISABLED: |
| 850 |
pr_warning("adsp: module '%s' already disabled\n", |
| 851 |
module->name); |
| 852 |
break; |
| 853 |
case ADSP_STATE_ENABLING: |
| 854 |
case ADSP_STATE_ENABLED: |
| 855 |
rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_DISABLE, |
| 856 |
module->id, module); |
| 857 |
module->state = ADSP_STATE_DISABLED; |
| 858 |
} |
| 859 |
return rc; |
| 860 |
} |
| 861 |
|
| 862 |
int msm_adsp_disable(struct msm_adsp_module *module) |
| 863 |
{ |
| 864 |
int rc; |
| 865 |
pr_info("msm_adsp_disable() '%s'\n", module->name); |
| 866 |
mutex_lock(&module->lock); |
| 867 |
rc = msm_adsp_disable_locked(module); |
| 868 |
mutex_unlock(&module->lock); |
| 869 |
return rc; |
| 870 |
} |
| 871 |
|
| 872 |
static int msm_adsp_probe(struct platform_device *pdev) |
| 873 |
{ |
| 874 |
unsigned count; |
| 875 |
int rc,i; |
| 876 |
|
| 877 |
wake_lock_init(&adsp_wake_lock, WAKE_LOCK_SUSPEND, "adsp"); |
| 878 |
|
| 879 |
switch(__amss_version) { |
| 880 |
case 5225: |
| 881 |
rc = adsp_init_info_5225(&adsp_info); |
| 882 |
int_adsp = INT_ADSP_A11; |
| 883 |
break; |
| 884 |
case 6125: |
| 885 |
rc = adsp_init_info_6125(&adsp_info); |
| 886 |
int_adsp = INT_ADSP_A9_A11; |
| 887 |
break; |
| 888 |
case 6150: |
| 889 |
rc = adsp_init_info_6150(&adsp_info); |
| 890 |
int_adsp = INT_ADSP_A11; |
| 891 |
break; |
| 892 |
case 6210: |
| 893 |
rc = adsp_init_info_6210(&adsp_info); |
| 894 |
int_adsp = INT_ADSP_A11; |
| 895 |
break; |
| 896 |
case 6220: |
| 897 |
rc = adsp_init_info_6220(&adsp_info); |
| 898 |
int_adsp = INT_ADSP_A9_A11; |
| 899 |
break; |
| 900 |
case 6225: |
| 901 |
rc = adsp_init_info_6225(&adsp_info); |
| 902 |
int_adsp = INT_ADSP_A9_A11; |
| 903 |
break; |
| 904 |
default: |
| 905 |
printk(KERN_ERR "Unsupported device for adsp driver\n"); |
| 906 |
rc=-ENODEV; |
| 907 |
break; |
| 908 |
} |
| 909 |
if (rc) |
| 910 |
return rc; |
| 911 |
adsp_info.send_irq += (uint32_t)MSM_AD5_BASE; |
| 912 |
adsp_info.read_ctrl += (uint32_t)MSM_AD5_BASE; |
| 913 |
adsp_info.write_ctrl += (uint32_t)MSM_AD5_BASE; |
| 914 |
count = adsp_info.module_count; |
| 915 |
adsp_modules = kzalloc( |
| 916 |
(sizeof(struct msm_adsp_module) + sizeof(void *)) * |
| 917 |
count, GFP_KERNEL); |
| 918 |
if (!adsp_modules) |
| 919 |
return -ENOMEM; |
| 920 |
|
| 921 |
adsp_info.id_to_module = (void *) (adsp_modules + count); |
| 922 |
|
| 923 |
spin_lock_init(&adsp_cmd_lock); |
| 924 |
|
| 925 |
rc = request_irq(int_adsp, adsp_irq_handler, IRQF_TRIGGER_RISING, |
| 926 |
"adsp", 0); |
| 927 |
if (rc < 0) |
| 928 |
goto fail_request_irq; |
| 929 |
disable_irq(int_adsp); |
| 930 |
|
| 931 |
rpc_cb_server_client = msm_rpc_open(); |
| 932 |
if (IS_ERR(rpc_cb_server_client)) { |
| 933 |
rpc_cb_server_client = NULL; |
| 934 |
rc = PTR_ERR(rpc_cb_server_client); |
| 935 |
pr_err("adsp: could not create rpc server (%d)\n", rc); |
| 936 |
goto fail_rpc_open; |
| 937 |
} |
| 938 |
// this cid has to be registered early in rpc init so us the value from then. |
| 939 |
|
| 940 |
rpc_cb_server_client->cid=adsp_cid; |
| 941 |
|
| 942 |
rc = msm_rpc_register_server(rpc_cb_server_client, |
| 943 |
RPC_ADSP_RTOS_MTOA_PROG, |
| 944 |
amss_get_num_value(RPC_ADSP_RTOS_MTOA_VERS)); |
| 945 |
|
| 946 |
if (rc) { |
| 947 |
pr_err("adsp: could not register callback server (%d)\n", rc); |
| 948 |
goto fail_rpc_register; |
| 949 |
} |
| 950 |
|
| 951 |
/* start the kernel thread to process the callbacks */ |
| 952 |
kthread_run(adsp_rpc_thread, NULL, "kadspd"); |
| 953 |
|
| 954 |
for (i = 0; i < count; i++) { |
| 955 |
struct msm_adsp_module *mod = adsp_modules + i; |
| 956 |
mutex_init(&mod->lock); |
| 957 |
init_waitqueue_head(&mod->state_wait); |
| 958 |
mod->info = &adsp_info; |
| 959 |
mod->name = adsp_info.module[i].name; |
| 960 |
mod->id = adsp_info.module[i].id; |
| 961 |
if (adsp_info.module[i].clk_name) |
| 962 |
mod->clk = clk_get(NULL, adsp_info.module[i].clk_name); |
| 963 |
else |
| 964 |
mod->clk = NULL; |
| 965 |
if (mod->clk && adsp_info.module[i].clk_rate) |
| 966 |
clk_set_rate(mod->clk, adsp_info.module[i].clk_rate); |
| 967 |
mod->verify_cmd = adsp_info.module[i].verify_cmd; |
| 968 |
mod->patch_event = adsp_info.module[i].patch_event; |
| 969 |
INIT_HLIST_HEAD(&mod->pmem_regions); |
| 970 |
mod->pdev.name = adsp_info.module[i].pdev_name; |
| 971 |
mod->pdev.id = -1; |
| 972 |
adsp_info.id_to_module[mod->id] = mod; |
| 973 |
platform_device_register(&mod->pdev); |
| 974 |
} |
| 975 |
|
| 976 |
msm_adsp_publish_cdevs(adsp_modules, count); |
| 977 |
|
| 978 |
return 0; |
| 979 |
|
| 980 |
fail_rpc_register: |
| 981 |
msm_rpc_close(rpc_cb_server_client); |
| 982 |
rpc_cb_server_client = NULL; |
| 983 |
fail_rpc_open: |
| 984 |
disable_irq(int_adsp); |
| 985 |
free_irq(int_adsp, 0); |
| 986 |
fail_request_irq: |
| 987 |
kfree(adsp_modules); |
| 988 |
return rc; |
| 989 |
} |
| 990 |
|
| 991 |
static struct platform_driver msm_adsp_driver = { |
| 992 |
.probe = msm_adsp_probe, |
| 993 |
.driver = { |
| 994 |
.owner = THIS_MODULE, |
| 995 |
}, |
| 996 |
}; |
| 997 |
|
| 998 |
static int __init adsp_init(void) |
| 999 |
{ |
| 1000 |
/* |
| 1001 |
int i; |
| 1002 |
unsigned *rpcchan; |
| 1003 |
if(!adsp_cid) { |
| 1004 |
printk("Searching for adsp_cid\n"); |
| 1005 |
rpcchan=smem_alloc(SMEM_SMD_BASE_ID+0x2,0x4028); |
| 1006 |
for(i=0;i<16384/4;i++) { |
| 1007 |
if(rpcchan[i]==0xfffffffe && rpcchan[i+1]==7 && rpcchan[i+2]==1) { |
| 1008 |
adsp_cid=rpcchan[i+3]; |
| 1009 |
printk("adsp cid found: %08x\n",adsp_cid); |
| 1010 |
break; |
| 1011 |
} |
| 1012 |
} |
| 1013 |
} else { |
| 1014 |
printk("Using adsp_cid=%08x\n", adsp_cid); |
| 1015 |
} |
| 1016 |
*/ |
| 1017 |
switch(__amss_version) { |
| 1018 |
case 5225: |
| 1019 |
case 6125: |
| 1020 |
case 6150: |
| 1021 |
msm_adsp_driver.driver.name = "rs3000000a:00000000"; |
| 1022 |
break; |
| 1023 |
case 6210: |
| 1024 |
msm_adsp_driver.driver.name = "rs3000000a:20f17fd3"; |
| 1025 |
break; |
| 1026 |
case 6220: |
| 1027 |
case 6225: |
| 1028 |
msm_adsp_driver.driver.name = "rs3000000a:71d1094b"; |
| 1029 |
break; |
| 1030 |
default: |
| 1031 |
printk(KERN_ERR "Unsupported device for adsp driver\n"); |
| 1032 |
return -ENODEV; |
| 1033 |
break; |
| 1034 |
} |
| 1035 |
|
| 1036 |
return platform_driver_register(&msm_adsp_driver); |
| 1037 |
} |
| 1038 |
|
| 1039 |
device_initcall(adsp_init); |