Commit 69cc611a9bec67b47abdf92eee2548a071976546
- Diff rendering mode:
- inline
- side by side
|   | |||
| 352 | 352 | void msm_arch_idle(void); | |
| 353 | 353 | static void htcraphael_reset(void) | |
| 354 | 354 | { | |
| 355 | struct msm_dex_command dex = { .cmd = PCOM_RESET_ARM9 }; | ||
| 356 | // struct msm_dex_command dex = { .cmd = PCOM_NOTIFY_ARM9_REBOOT }; | ||
| 355 | //struct msm_dex_command dex = { .cmd = PCOM_RESET_ARM9 }; | ||
| 356 | while(!readl(MSM_SHARED_RAM_BASE+0xfc13c)); | ||
| 357 | struct msm_dex_command dex = { .cmd = PCOM_NOTIFY_ARM9_REBOOT }; | ||
| 357 | 358 | msm_proc_comm_wince(&dex, 0); | |
| 358 | 359 | mdelay(0x15e); | |
| 359 | gpio_configure(25, GPIOF_OWNER_ARM11); | ||
| 360 | gpio_direction_output(25, 0); | ||
| 360 | //gpio_configure(25, GPIOF_OWNER_ARM11); | ||
| 361 | //gpio_set_value(25, 0); | ||
| 362 | /* | ||
| 361 | 363 | printk(KERN_INFO "%s: Soft reset done.\n", __func__); | |
| 362 | 364 | while(1) | |
| 363 | 365 | msm_arch_idle(); | |
| 366 | */ | ||
| 364 | 367 | } | |
| 365 | 368 | ||
| 366 | 369 | static void htcraphael_set_vibrate(uint32_t val) |
|   | |||
| 66 | 66 | .pa_reg_msg4 = 0x003fefe0, | |
| 67 | 67 | }; | |
| 68 | 68 | ||
| 69 | #define RPC_PDSM_ATL_PROG 0x3000001d | ||
| 70 | #define RPC_PDSM_ATL_CB_PROG 0x3100001d | ||
| 69 | //#define RPC_PDSM_ATL_PROG 0x3000001d | ||
| 70 | //#define RPC_PDSM_ATL_CB_PROG 0x3100001d | ||
| 71 | 71 | //#define L2_PROXY_REG 4 | |
| 72 | 72 | ||
| 73 | 73 | /* TODO: replace with msm_rpc_call_reply() values */ | |
| … | … | ||
| 141 | 141 | } rep; | |
| 142 | 142 | ||
| 143 | 143 | /* register CB */ | |
| 144 | pdapi_rpc_server.prog = amss_get_num_value(RPC_PDAPI_CB_PROG); | ||
| 145 | pdsm_atl_rpc_server.prog = amss_get_num_value(RPC_PDSM_ATL_CB_PROG); | ||
| 144 | pdapi_rpc_server.prog = 0x3100005b; | ||
| 145 | pdsm_atl_rpc_server.prog = 0x3100001d; | ||
| 146 | 146 | msm_rpc_create_server(&pdapi_rpc_server); | |
| 147 | 147 | msm_rpc_create_server(&pdsm_atl_rpc_server); | |
| 148 | return; | ||
| 149 | //Let android's libgps.so handle that | ||
| 148 | 150 | ||
| 149 | 151 | /* init pd */ | |
| 150 | 152 | printk ("init_pd\n"); |
|   | |||
| 54 | 54 | DOG_KEEPALIVE_PROG, | |
| 55 | 55 | DOG_KEEPALIVE_VERS, | |
| 56 | 56 | RPC_PDAPI_PROG, | |
| 57 | RPC_PDAPI_CB_PROG | ||
| 57 | RPC_PDAPI_CB_PROG, | ||
| 58 | RPC_PDSM_ATL_PROG, | ||
| 59 | RPC_PDSM_ATL_CB_PROG | ||
| 58 | 60 | }; | |
| 59 | 61 | ||
| 60 | 62 | extern uint32_t amss_get_num_value(int); |
arch/arm/mach-msm/pm.c
(6 / 4)
|   | |||
| 28 | 28 | #include <mach/system.h> | |
| 29 | 29 | #include <mach/fiq.h> | |
| 30 | 30 | #include <asm/io.h> | |
| 31 | #include <mach/io.h> | ||
| 32 | #include <mach/gpio.h> | ||
| 31 | 33 | ||
| 32 | 34 | #include "smd_private.h" | |
| 33 | 35 | #include "acpuclock.h" | |
| … | … | ||
| 480 | 480 | * reset command. | |
| 481 | 481 | */ | |
| 482 | 482 | #ifdef CONFIG_MSM_AMSS_VERSION_WINCE | |
| 483 | if (msm_hw_reset_hook) | ||
| 484 | msm_hw_reset_hook(); | ||
| 485 | else | ||
| 486 | printk(KERN_ERR "No msm_hw_reset_hook() available! System halted.\n"); | ||
| 483 | writel(0x55aa00ff, MSM_SHARED_RAM_BASE+0xfc08c); | ||
| 484 | gpio_configure(25, GPIOF_OWNER_ARM11); | ||
| 485 | gpio_set_value(25, 0); | ||
| 486 | |||
| 487 | 487 | #else | |
| 488 | 488 | if ((restart_reason == 0x776655AA) && msm_hw_reset_hook) { | |
| 489 | 489 | msm_hw_reset_hook(); |
|   | |||
| 108 | 108 | { | |
| 109 | 109 | printk(KERN_WARNING "%s: DEX cmd timed out. status=0x%x, A2Mcntr=%x, M2Acntr=%x\n", | |
| 110 | 110 | __func__, readl(base + PC_STATUS), num, readl(base + PC_SERIAL_CHECK)); | |
| 111 | printk("DEX IRQ=%x\n", readl(MSM_SHARED_RAM_BASE+0xfc138)); | ||
| 111 | 112 | goto end; | |
| 112 | 113 | } | |
| 113 | 114 |
|   | |||
| 53 | 53 | {DOG_KEEPALIVE_VERS, 0, ""}, | |
| 54 | 54 | {RPC_PDAPI_PROG, 0x3000005b, ""}, | |
| 55 | 55 | {RPC_PDAPI_CB_PROG, 0x3100005b, ""}, | |
| 56 | {RPC_PDSM_ATL_PROG, 0x3000001d, ""}, | ||
| 57 | {RPC_PDSM_ATL_CB_PROG, 0x3100001d, ""}, | ||
| 56 | 58 | }; | |
| 57 | 59 | ||
| 58 | 60 |
arch/arm/mach-msm/smd.c
(13 / 6)
|   | |||
| 83 | 83 | pr_info("smem: DIAG '%s'\n", x); | |
| 84 | 84 | } | |
| 85 | 85 | } | |
| 86 | extern int msm_proc_comm_wince_init(); | ||
| 86 | 87 | ||
| 87 | 88 | /* call when SMSM_RESET flag is set in the A9's smsm_state */ | |
| 88 | 89 | static void handle_modem_crash(void) | |
| … | … | ||
| 91 | 91 | pr_err("ARM9 has CRASHED\n"); | |
| 92 | 92 | smd_diag(); | |
| 93 | 93 | ||
| 94 | /* hard reboot if possible */ | ||
| 95 | if (msm_hw_reset_hook) | ||
| 96 | msm_hw_reset_hook(); | ||
| 94 | printk("DEX IRQ=%x\n", readl(MSM_SHARED_RAM_BASE+0xfc138)); | ||
| 95 | while(!readl(MSM_SHARED_RAM_BASE+0xfc13c)); | ||
| 96 | printk("DEX READY\n"); | ||
| 97 | struct msm_dex_command dex = { .cmd = PCOM_NOTIFY_ARM9_REBOOT }; | ||
| 98 | msm_proc_comm_wince(&dex, 0); | ||
| 99 | mdelay(0x15e); | ||
| 100 | printk("notify_arm9_reboot sent\n"); | ||
| 101 | printk("DEX IRQ=%x\n", readl(MSM_SHARED_RAM_BASE+0xfc138)); | ||
| 102 | while(!readl(MSM_SHARED_RAM_BASE+0xfc13c)); | ||
| 103 | printk("DEX READY\n"); | ||
| 104 | printk("DEX IRQ=%x\n", readl(MSM_SHARED_RAM_BASE+0xfc138)); | ||
| 97 | 105 | ||
| 98 | /* in this case the modem or watchdog should reboot us */ | ||
| 99 | for (;;) | ||
| 100 | ; | ||
| 106 | |||
| 101 | 107 | } | |
| 102 | 108 | ||
| 103 | 109 | extern int (*msm_check_for_modem_crash)(void); |
|   | |||
| 75 | 75 | struct msm_rpc_endpoint *ept; | |
| 76 | 76 | struct rr_fragment *frag, *next; | |
| 77 | 77 | int rc; | |
| 78 | int i; | ||
| 79 | unsigned int *tmp,*base; | ||
| 78 | 80 | ||
| 79 | 81 | ept = (struct msm_rpc_endpoint *) filp->private_data; | |
| 80 | 82 | ||
| … | … | ||
| 85 | 85 | return rc; | |
| 86 | 86 | ||
| 87 | 87 | count = rc; | |
| 88 | base=buf; | ||
| 88 | 89 | ||
| 90 | printk("oncrpc read\n\t"); | ||
| 89 | 91 | while (frag != NULL) { | |
| 90 | 92 | if (copy_to_user(buf, frag->data, frag->length)) { | |
| 91 | 93 | printk(KERN_ERR | |
| … | … | ||
| 99 | 99 | kfree(frag); | |
| 100 | 100 | frag = next; | |
| 101 | 101 | } | |
| 102 | for(i=0;i<(count/4);i++) { | ||
| 103 | if(be32_to_cpu(base[i])==0x3100005b) { | ||
| 104 | base[i+1]=cpu_to_be32(0xB93145F7); | ||
| 105 | base[i+2]=cpu_to_be32(be32_to_cpu(base[i+2])-1); | ||
| 106 | } | ||
| 107 | if(be32_to_cpu(base[i])==0x3100001d) | ||
| 108 | base[i+1]=cpu_to_be32(0x728B7ED4); | ||
| 109 | printk("%08x ", be32_to_cpu(base[i])); | ||
| 110 | } | ||
| 102 | 111 | ||
| 112 | printk("\n"); | ||
| 103 | 113 | return rc; | |
| 104 | 114 | } | |
| 105 | 115 | ||
| … | … | ||
| 118 | 118 | { | |
| 119 | 119 | struct msm_rpc_endpoint *ept; | |
| 120 | 120 | int rc = 0; | |
| 121 | void *k_buffer; | ||
| 121 | unsigned long *k_buffer; | ||
| 122 | struct rpc_request_hdr *rq; | ||
| 122 | 123 | ||
| 123 | 124 | ept = (struct msm_rpc_endpoint *) filp->private_data; | |
| 124 | 125 | ||
| … | … | ||
| 134 | 134 | rc = -EFAULT; | |
| 135 | 135 | goto write_out_free; | |
| 136 | 136 | } | |
| 137 | rq=k_buffer; | ||
| 138 | printk("oncrpc write\n"); | ||
| 139 | printk("before diverting\n\t"); | ||
| 140 | for(rc=0;rc<(count/4);rc++) { | ||
| 141 | if(k_buffer[1]==0 && (rc==1 || rc==2|| rc==6 || rc==7 || rc==8 || rc==9)) | ||
| 142 | continue; | ||
| 143 | printk("%08x ", be32_to_cpu(k_buffer[rc])); | ||
| 144 | } | ||
| 145 | printk("\n"); | ||
| 137 | 146 | ||
| 147 | if(be32_to_cpu(rq->prog)==0x3000005b) { | ||
| 148 | printk("PDAPI call\n"); | ||
| 149 | rq->vers=0; | ||
| 150 | switch(be32_to_cpu(rq->procedure)) { | ||
| 151 | case 2: | ||
| 152 | case 4: | ||
| 153 | case 5: | ||
| 154 | case 6: | ||
| 155 | case 7: | ||
| 156 | case 8: | ||
| 157 | case 9: | ||
| 158 | case 0xa: | ||
| 159 | case 0xb: | ||
| 160 | case 0xc: | ||
| 161 | case 0x1d: | ||
| 162 | //Ok seriously. Which calls aren't translated by 1 ? | ||
| 163 | default: | ||
| 164 | rq->procedure=cpu_to_be32(be32_to_cpu(rq->procedure)+1); | ||
| 165 | break; | ||
| 166 | } | ||
| 167 | switch(be32_to_cpu(rq->procedure)) { | ||
| 168 | case 3: | ||
| 169 | printk("pdsm_client_init\n"); | ||
| 170 | break; | ||
| 171 | case 5: | ||
| 172 | printk("pdsm_client_pd_reg\n"); | ||
| 173 | break; | ||
| 174 | case 6: | ||
| 175 | printk("pdsm_client_pa_reg\n"); | ||
| 176 | break; | ||
| 177 | case 7: | ||
| 178 | printk("pdsm_client_lcs_reg\n"); | ||
| 179 | break; | ||
| 180 | case 8: | ||
| 181 | printk("pdsm_client_xtra_reg\n"); | ||
| 182 | break; | ||
| 183 | case 9: | ||
| 184 | printk("pdsm_client_ext_status_reg\n"); | ||
| 185 | break; | ||
| 186 | case 0xa: | ||
| 187 | printk("pdsm_client_act\n"); | ||
| 188 | break; | ||
| 189 | case 0xc: | ||
| 190 | printk("pdsm_get_position\n"); | ||
| 191 | break; | ||
| 192 | case 0xd: | ||
| 193 | printk("pdsm_end_position\n"); | ||
| 194 | break; | ||
| 195 | }; | ||
| 196 | } else if(be32_to_cpu(rq->prog)==0x3000001d) { | ||
| 197 | printk("ATL call\n"); | ||
| 198 | rq->vers=0; | ||
| 199 | rq->procedure=cpu_to_be32(be32_to_cpu(rq->procedure)+1); | ||
| 200 | if(be32_to_cpu(rq->procedure)==4) { | ||
| 201 | k_buffer[11]=cpu_to_be32(4); | ||
| 202 | k_buffer[12]=cpu_to_be32(5); | ||
| 203 | } | ||
| 204 | } | ||
| 205 | printk("after\n\t"); | ||
| 206 | for(rc=0;rc<(count/4);rc++) { | ||
| 207 | if( k_buffer[1]==0 && (rc==1 || rc==2|| rc==6 || rc==7 || rc==8 || rc==9)) | ||
| 208 | continue; | ||
| 209 | printk("%08x ", be32_to_cpu(k_buffer[rc])); | ||
| 210 | } | ||
| 211 | printk("\n"); | ||
| 138 | 212 | rc = msm_rpc_write(ept, k_buffer, count); | |
| 139 | 213 | if (rc < 0) | |
| 140 | 214 | goto write_out_free; | |
| … | … | ||
| 272 | 272 | sizeof(server_args)); | |
| 273 | 273 | if (rc < 0) | |
| 274 | 274 | break; | |
| 275 | if(server_args.prog==0x3100001d) | ||
| 276 | server_args.vers=0; | ||
| 275 | 277 | msm_rpc_register_server(ept, | |
| 276 | 278 | server_args.prog, | |
| 277 | 279 | server_args.vers); |

