ENGR00143575 IPUv3:Align IDMAC BS with DMFC FIFO BS
[efikamx:linux-kernel.git] / drivers / mxc / ipu3 / ipu_prv.h
1 /*
2  * Copyright 2005-2011 Freescale Semiconductor, Inc. All Rights Reserved.
3  */
4
5 /*
6  * The code contained herein is licensed under the GNU General Public
7  * License. You may obtain a copy of the GNU General Public License
8  * Version 2 or later at the following locations:
9  *
10  * http://www.opensource.org/licenses/gpl-license.html
11  * http://www.gnu.org/copyleft/gpl.html
12  */
13 #ifndef __INCLUDE_IPU_PRV_H__
14 #define __INCLUDE_IPU_PRV_H__
15
16 #include <linux/types.h>
17 #include <linux/device.h>
18 #include <linux/clk.h>
19 #include <linux/interrupt.h>
20 #include <mach/hardware.h>
21
22 /* Globals */
23 extern struct device *g_ipu_dev;
24 extern spinlock_t ipu_lock;
25 extern bool g_ipu_clk_enabled;
26 extern struct clk *g_ipu_clk;
27 extern struct clk *g_di_clk[2];
28 extern struct clk *g_pixel_clk[2];
29 extern struct clk *g_csi_clk[2];
30 extern unsigned char g_dc_di_assignment[];
31 extern int g_ipu_hw_rev;
32 extern int dmfc_type_setup;
33
34 #define IDMA_CHAN_INVALID       0xFF
35 #define HIGH_RESOLUTION_WIDTH   1024
36
37 struct ipu_channel {
38         u8 video_in_dma;
39         u8 alpha_in_dma;
40         u8 graph_in_dma;
41         u8 out_dma;
42 };
43
44 enum ipu_dmfc_type {
45         DMFC_NORMAL = 0,
46         DMFC_HIGH_RESOLUTION_DC,
47         DMFC_HIGH_RESOLUTION_DP,
48         DMFC_HIGH_RESOLUTION_ONLY_DP,
49 };
50
51 int register_ipu_device(void);
52 ipu_color_space_t format_to_colorspace(uint32_t fmt);
53 bool ipu_pixel_format_has_alpha(uint32_t fmt);
54
55 void ipu_dump_registers(void);
56
57 uint32_t _ipu_channel_status(ipu_channel_t channel);
58
59 void _ipu_init_dc_mappings(void);
60 int _ipu_dp_init(ipu_channel_t channel, uint32_t in_pixel_fmt,
61                  uint32_t out_pixel_fmt);
62 void _ipu_dp_uninit(ipu_channel_t channel);
63 void _ipu_dc_init(int dc_chan, int di, bool interlaced, uint32_t pixel_fmt);
64 void _ipu_dc_uninit(int dc_chan);
65 void _ipu_dp_dc_enable(ipu_channel_t channel);
66 void _ipu_dp_dc_disable(ipu_channel_t channel, bool swap);
67 void _ipu_dmfc_init(int dmfc_type, int first);
68 void _ipu_dmfc_set_wait4eot(int dma_chan, int width);
69 int _ipu_chan_is_interlaced(ipu_channel_t channel);
70 void _ipu_dmfc_set_burst_size(int dma_chan, int burst_size);
71
72 void _ipu_ic_enable_task(ipu_channel_t channel);
73 void _ipu_ic_disable_task(ipu_channel_t channel);
74 void _ipu_ic_init_prpvf(ipu_channel_params_t *params, bool src_is_csi);
75 void _ipu_vdi_init(ipu_channel_t channel, ipu_channel_params_t *params);
76 void _ipu_vdi_uninit(void);
77 void _ipu_ic_uninit_prpvf(void);
78 void _ipu_ic_init_rotate_vf(ipu_channel_params_t *params);
79 void _ipu_ic_uninit_rotate_vf(void);
80 void _ipu_ic_init_csi(ipu_channel_params_t *params);
81 void _ipu_ic_uninit_csi(void);
82 void _ipu_ic_init_prpenc(ipu_channel_params_t *params, bool src_is_csi);
83 void _ipu_ic_uninit_prpenc(void);
84 void _ipu_ic_init_rotate_enc(ipu_channel_params_t *params);
85 void _ipu_ic_uninit_rotate_enc(void);
86 void _ipu_ic_init_pp(ipu_channel_params_t *params);
87 void _ipu_ic_uninit_pp(void);
88 void _ipu_ic_init_rotate_pp(ipu_channel_params_t *params);
89 void _ipu_ic_uninit_rotate_pp(void);
90 int _ipu_ic_idma_init(int dma_chan, uint16_t width, uint16_t height,
91                       int burst_size, ipu_rotate_mode_t rot);
92 void _ipu_vdi_toggle_top_field_man(void);
93 int _ipu_csi_init(ipu_channel_t channel, uint32_t csi);
94 void ipu_csi_set_test_generator(bool active, uint32_t r_value,
95                 uint32_t g_value, uint32_t b_value,
96                 uint32_t pix_clk, uint32_t csi);
97 void _ipu_csi_ccir_err_detection_enable(uint32_t csi);
98 void _ipu_csi_ccir_err_detection_disable(uint32_t csi);
99 void _ipu_smfc_init(ipu_channel_t channel, uint32_t mipi_id, uint32_t csi);
100 void _ipu_smfc_set_burst_size(ipu_channel_t channel, uint32_t bs);
101 void _ipu_dp_set_csc_coefficients(ipu_channel_t channel, int32_t param[][3]);
102 void _ipu_clear_buffer_ready(ipu_channel_t channel, ipu_buffer_t type,
103                              uint32_t bufNum);
104
105 #endif                          /* __INCLUDE_IPU_PRV_H__ */