intel/gm45: Refactor DDR3 write training
authorNico Huber <nico.huber@secunet.com>
Tue, 14 May 2013 09:58:44 +0000 (11:58 +0200)
committerStefan Reinauer <stefan.reinauer@coreboot.org>
Wed, 22 May 2013 16:04:11 +0000 (18:04 +0200)
commit08bee23f7eb31cce4746c51cfde3a7017e0e8b8e
tree53d1e22e71ec63ae1e888cc2312f1ac53b8c3508
parent35e45c078054a7bd64ba54b8b84b07602e8dd4ff
intel/gm45: Refactor DDR3 write training

Split some code in individual functions. It's the refactoring part of
a bigger change, following...

Change-Id: Id19be4588ad8984935040d9bcba4d7c5f2e1114f
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3255
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
src/northbridge/intel/gm45/raminit_read_write_training.c