lynxpoint: Fix LP clock gating setup for LPC
authorDuncan Laurie <dlaurie@chromium.org>
Fri, 22 Mar 2013 18:24:45 +0000 (11:24 -0700)
committerRonald G. Minnich <rminnich@gmail.com>
Mon, 1 Apr 2013 21:27:21 +0000 (23:27 +0200)
commita2d6a40480c97043e9126c0fbc9e1a79db22d408
treefe62358015161ca7c301276bd1e78d31d467b4ca
parent0ce2b4368286df8267bfb290b206671825981248
lynxpoint: Fix LP clock gating setup for LPC

This bit offset is incorrect and should only be set based
on another bit in a different register.

Change-Id: I6037534236e3a4a5d15e15011ed9b5040b435eaf
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/2973
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
src/southbridge/intel/lynxpoint/lpc.c