copy_and_run: drop boot_complete parameter
[gnutoo-for-coreboot:coreboot.git] / src / mainboard / amd / thatcher / romstage.c
1 /*
2  * This file is part of the coreboot project.
3  *
4  * Copyright (C) 2012 Advanced Micro Devices, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; version 2 of the License.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18  */
19
20 #include <stdint.h>
21 #include <string.h>
22 #include <device/pci_def.h>
23 #include <device/pci_ids.h>
24 #include <arch/io.h>
25 #include <arch/stages.h>
26 #include <device/pnp_def.h>
27 #include <arch/cpu.h>
28 #include <cpu/x86/lapic.h>
29 #include <console/console.h>
30 #include <console/loglevel.h>
31 #include "agesawrapper.h"
32 #include "cpu/x86/bist.h"
33 #include "cpu/x86/lapic/boot_cpu.c"
34 #include "southbridge/amd/agesa/hudson/hudson.h"
35 #include "src/superio/smsc/lpc47n217/early_serial.c"
36 #include "cpu/amd/agesa/s3_resume.h"
37 #include "src/drivers/pc80/i8254.c"
38 #include "src/drivers/pc80/i8259.c"
39 #include "cbmem.h"
40
41 #define SERIAL_DEV PNP_DEV(0x2e, LPC47N217_SP1)
42
43 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
44 void disable_cache_as_ram(void);
45
46 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
47 {
48         u32 val;
49         u8 byte;
50         device_t dev;
51 #if CONFIG_HAVE_ACPI_RESUME
52         void *resume_backup_memory;
53 #endif
54         val = agesawrapper_amdinitmmio();
55
56         hudson_lpc_port80();
57         //__asm__ volatile ("1: jmp 1b");
58         /* TODO: */
59         dev = PCI_DEV(0, 0x14, 3);//pci_locate_device(PCI_ID(0x1002, 0x439D), 0);
60         byte = pci_read_config8(dev, 0x48);
61         byte |= 3;              /* 2e, 2f */
62         pci_write_config8(dev, 0x48, byte);
63
64         if (!cpu_init_detectedx && boot_cpu()) {
65                 post_code(0x30);
66
67                 post_code(0x31);
68                 lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
69                 outb(0x24, 0xcd6);
70                 outb(0x1, 0xcd7);
71                 outb(0xea, 0xcd6);
72                 outb(0x1, 0xcd7);
73                 *(u8 *)0xfed80101 = 0x98;
74                 console_init();
75         }
76
77         /* Halt if there was a built in self test failure */
78         post_code(0x34);
79         report_bist_failure(bist);
80
81         /* Load MPB */
82         val = cpuid_eax(1);
83         printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
84         printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
85
86         post_code(0x37);
87         printk(BIOS_DEBUG, "agesawrapper_amdinitreset ");
88         val = agesawrapper_amdinitreset();
89         if(val) {
90                 printk(BIOS_DEBUG, "agesawrapper_amdinitreset failed: %x \n", val);
91         }
92
93         post_code(0x39);
94
95         val = agesawrapper_amdinitearly ();
96         if(val) {
97                 printk(BIOS_DEBUG, "agesawrapper_amdinitearly failed: %x \n", val);
98         }
99         printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
100
101 #if CONFIG_HAVE_ACPI_RESUME
102         if (!acpi_is_wakeup_early()) {          /* Check for S3 resume */
103 #endif
104                 post_code(0x40);
105                 val = agesawrapper_amdinitpost ();
106                 if(val) {
107                         printk(BIOS_DEBUG, "agesawrapper_amdinitpost failed: %x \n", val);
108                 }
109                 printk(BIOS_DEBUG, "Got past agesawrapper_amdinitpost\n");
110
111                 post_code(0x41);
112                 val = agesawrapper_amdinitenv ();
113                 if(val) {
114                         printk(BIOS_DEBUG, "agesawrapper_amdinitenv failed: %x \n", val);
115                 }
116                 printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
117                 disable_cache_as_ram();
118 #if CONFIG_HAVE_ACPI_RESUME
119         } else {                /* S3 detect */
120                 printk(BIOS_INFO, "S3 detected\n");
121
122                 post_code(0x60);
123                 printk(BIOS_DEBUG, "agesawrapper_amdinitresume ");
124                 val = agesawrapper_amdinitresume();
125                 if (val)
126                         printk(BIOS_DEBUG, "error level: %x \n", val);
127                 else
128                         printk(BIOS_DEBUG, "passed.\n");
129
130                 printk(BIOS_DEBUG, "agesawrapper_amds3laterestore ");
131                 val = agesawrapper_amds3laterestore ();
132                 if (val)
133                         printk(BIOS_DEBUG, "error level: %x \n", val);
134                 else
135                         printk(BIOS_DEBUG, "passed.\n");
136
137                 post_code(0x61);
138                 printk(BIOS_DEBUG, "Find resume memory location\n");
139                 resume_backup_memory = (void *)backup_resume();
140
141                 post_code(0x62);
142                 printk(BIOS_DEBUG, "Move CAR stack.\n");
143                 move_stack_high_mem();
144                 printk(BIOS_DEBUG, "stack moved to: 0x%x\n", (u32) (resume_backup_memory + HIGH_MEMORY_SAVE));
145
146                 post_code(0x63);
147                 disable_cache_as_ram();
148                 printk(BIOS_DEBUG, "CAR disabled.\n");
149                 set_resume_cache();
150
151                 /*
152                  * Copy the system memory that is in the ramstage area to the
153                  * reserved area.
154                  */
155                 if (resume_backup_memory)
156                         memcpy(resume_backup_memory, (void *)(CONFIG_RAMBASE), HIGH_MEMORY_SAVE);
157
158                 printk(BIOS_DEBUG, "System memory saved. OK to load ramstage.\n");
159         }
160 #endif
161
162         /* Initialize i8259 pic */
163         post_code(0x41);
164         setup_i8259 ();
165
166         /* Initialize i8254 timers */
167         post_code(0x42);
168         setup_i8254 ();
169
170         post_code(0x50);
171         copy_and_run();
172
173         post_code(0x54);  /* Should never see this post code. */
174 }