nm-kernel:u-boot-nm.git
3 years agonokia_rx51: have just bootm_size v2014.04-mod/n900-mods-for-automation
Nishanth Menon [Tue, 22 Apr 2014 19:17:17 +0000 (14:17 -0500)]
nokia_rx51: have just bootm_size

Signed-off-by: Nishanth Menon <nm@ti.com>
3 years agonokia_rx51: reduce baudrate to 57600
Nishanth Menon [Mon, 7 Apr 2014 22:08:39 +0000 (17:08 -0500)]
nokia_rx51: reduce baudrate to 57600

57600 seems stable with serial downloads. so slow things down.

Signed-off-by: Nishanth Menon <nm@ti.com>
3 years agonokia_rx51: define loadaddr
Nishanth Menon [Mon, 7 Apr 2014 16:42:32 +0000 (11:42 -0500)]
nokia_rx51: define loadaddr

Signed-off-by: Nishanth Menon <nm@ti.com>
3 years agoN900: update configuration file
Nishanth Menon [Wed, 2 Apr 2014 16:54:21 +0000 (11:54 -0500)]
N900: update configuration file

Signed-off-by: Nishanth Menon <nm@ti.com>
3 years agoti_arm_v7: do everything in under 128MB please
Nishanth Menon [Tue, 22 Apr 2014 19:27:02 +0000 (14:27 -0500)]
ti_arm_v7: do everything in under 128MB please

Signed-off-by: Nishanth Menon <nm@ti.com>
3 years agoMerge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Albert ARIBAUD [Mon, 21 Apr 2014 19:01:35 +0000 (21:01 +0200)]
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

3 years agoMerge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
Albert ARIBAUD [Mon, 21 Apr 2014 18:13:48 +0000 (20:13 +0200)]
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'

3 years agoam43xx_evm: Drop SPI SPL
Tom Rini [Thu, 17 Apr 2014 21:40:15 +0000 (17:40 -0400)]
am43xx_evm: Drop SPI SPL

QSPI booting on this board does not use SPL, so drop SPI-SPL related
options.

Signed-off-by: Tom Rini <trini@ti.com>
3 years agoarm, da850: staticize funtions
Manish Badarkhe [Fri, 11 Apr 2014 02:32:04 +0000 (08:02 +0530)]
arm, da850: staticize funtions

Make funtions static which are locally used in file
and remove the declaration from header file.

Signed-off-by: Manish Badarkhe <badarkhe.manish@gmail.com>
3 years agoam335x: Switch to CONFIG_SKIP_LOWLEVEL_INIT from guarding SPL or NOR_BOOT
Tom Rini [Wed, 9 Apr 2014 12:25:57 +0000 (08:25 -0400)]
am335x: Switch to CONFIG_SKIP_LOWLEVEL_INIT from guarding SPL or NOR_BOOT

In the case of SPL or NOR_BOOT (no SPL involved) we need to include
certain code in the build.  Use !CONFIG_SKIP_LOWLEVEL_INIT rather than
CONFIG_SPL_BUILD || CONFIG_NOR_BOOT to make the code clearer, and to
make supporting XIP QSPI boot clearer in the code.

Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Wolfgang Denk <wd@denx.de>
3 years agoomap3: zoom1: switch to generic ti_omap3_common config header
Nishanth Menon [Tue, 8 Apr 2014 14:50:58 +0000 (09:50 -0500)]
omap3: zoom1: switch to generic ti_omap3_common config header

ti_omap3_common contains a lot of common header definitions that help
reduce the size of the zoom1 config file. So, use the generic header
and customize as needed for the platform (example: no spl).

Signed-off-by: Nishanth Menon <nm@ti.com>
3 years agoomap3: zoom1: fix default console
Nishanth Menon [Tue, 8 Apr 2014 14:50:57 +0000 (09:50 -0500)]
omap3: zoom1: fix default console

We do not use ttyS2 anymore in Linux, it changed to ttyO2 a few years
back. never too late to update.

Signed-off-by: Nishanth Menon <nm@ti.com>
3 years agoomap3: zoom1: enable bootz
Nishanth Menon [Tue, 8 Apr 2014 14:50:56 +0000 (09:50 -0500)]
omap3: zoom1: enable bootz

Boot from zImage and fdt_file if uImage is not available to maintain
the legacy behavior.

Signed-off-by: Nishanth Menon <nm@ti.com>
3 years agoomap3: zoom1: disable JFFS2 and enable FS_GENERIC
Nishanth Menon [Tue, 8 Apr 2014 14:50:55 +0000 (09:50 -0500)]
omap3: zoom1: disable JFFS2 and enable FS_GENERIC

This is more in line with commits
664979a2a9f764b63b8094458b87247d254b0cc1(omap3_beagle: remove JFFS2
support.) and 102ce9ea7afdda80fe25aa786975e1722196bdb9 (omap3_beagle:
enable CMD_FS_GENERIC and simplify load of image/ramdisk)

CMD_FS_GENERIC allows us to simplify where we load up our image from
either from ext2/fat etc. So, lets use that instead of cumbersome
options we'd have to use. Sticking with existing conventions,
defaults will be:
bootfile=uImage
bootpart=0:1 (first partition)
bootdir=/ (/ in first partition)

Signed-off-by: Nishanth Menon <nm@ti.com>
3 years agoomap3: zoom1: enable common network commands
Nishanth Menon [Tue, 8 Apr 2014 14:50:54 +0000 (09:50 -0500)]
omap3: zoom1: enable common network commands

Basic networking commands for usability.

Signed-off-by: Nishanth Menon <nm@ti.com>
3 years agoOMAP3: zoom1: enable LAN9211
Nishanth Menon [Tue, 8 Apr 2014 14:50:53 +0000 (09:50 -0500)]
OMAP3: zoom1: enable LAN9211

Zoom1 was wrongly setup for LAN91C96. Fix it by enabling
LAN9211.

Signed-off-by: Nishanth Menon <nm@ti.com>
3 years agoOMAP3: zoom1: Configure GPMC for Ethernet
Nishanth Menon [Tue, 8 Apr 2014 14:50:52 +0000 (09:50 -0500)]
OMAP3: zoom1: Configure GPMC for Ethernet

zoom1 uses LAN9211 configured over GPMC Chip Select 1.

Signed-off-by: Nishanth Menon <nm@ti.com>
3 years agoomap3: zoom1: enable CONFIG_SYS_GENERIC_BOARD
Nishanth Menon [Tue, 8 Apr 2014 14:50:51 +0000 (09:50 -0500)]
omap3: zoom1: enable CONFIG_SYS_GENERIC_BOARD

CONFIG_SYS_GENERIC_BOARD should now be enabled for generic
functionality Further information in doc/README.generic-board

Signed-off-by: Nishanth Menon <nm@ti.com>
3 years agokeystone2: net: add keystone ethernet driver
Karicheri, Muralidharan [Tue, 1 Apr 2014 19:01:13 +0000 (15:01 -0400)]
keystone2: net: add keystone ethernet driver

Ethernet driver configures the CPSW, SGMI and Phy and uses
the the Navigator APIs. The driver supports 4 Ethernet ports and
can work with only one port at a time.

Port configurations are defined in board.c.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
3 years agokeystone2: add keystone multicore navigator driver
Vitaly Andrianov [Tue, 1 Apr 2014 19:01:12 +0000 (15:01 -0400)]
keystone2: add keystone multicore navigator driver

Multicore navigator consists of Network Coprocessor (NetCP) and
Queue Manager sub system. More details on the hardware can
be obtained from the following links:-

Network Coprocessor: http://www.ti.com/lit/pdf/sprugz6
Multicore Navigator: http://www.ti.com/lit/pdf/sprugr9

Multicore navigator driver implements APIs to configure
the Queue Manager and NetCP Pkt DMA.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Acked-by: Tom Rini <trini@ti.com>
3 years agok2hk-evm: add configuration for spi1 and spi2 support
Karicheri, Muralidharan [Fri, 4 Apr 2014 17:16:55 +0000 (13:16 -0400)]
k2hk-evm: add configuration for spi1 and spi2 support

currently only spi0 is enabled on k2hk evm. This
configuration update is needed to enable spi1 and spi2.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Tom Rini <trini@ti.com>
3 years agospi: davinci: add support for multiple bus and chip select
Karicheri, Muralidharan [Fri, 4 Apr 2014 17:16:54 +0000 (13:16 -0400)]
spi: davinci: add support for multiple bus and chip select

Currently davinci spi driver supports only bus 0 cs 0.
This patch allows driver to support bus 1 and bus 2 with
configurable number of chip selects. Also defaults are
selected in a way to avoid regression on other platforms
that uses davinci spi driver and has only one spi bus.

Signed-off-by: Rex Chang <rchang@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
3 years agok2hk: add support for k2hk SOC and EVM
Vitaly Andrianov [Fri, 4 Apr 2014 17:16:53 +0000 (13:16 -0400)]
k2hk: add support for k2hk SOC and EVM

k2hk EVM is based on Texas Instruments Keystone2 Hawking/Kepler
SoC. Keystone2 SoC has ARM v7 Cortex-A15 MPCore processor. Please
refer the ti/k2hk_evm/README for details on the board, build and other
information.

This patch add support for keystone architecture and k2hk evm.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Sandeep Nair <sandeep_n@ti.com>
3 years agoi2c, davinci: convert driver to new mutlibus/mutliadapter framework
Vitaly Andrianov [Fri, 4 Apr 2014 17:16:52 +0000 (13:16 -0400)]
i2c, davinci: convert driver to new mutlibus/mutliadapter framework

    - add davinci driver to new multibus/multiadpater support
    - adapted all config files, which uses this driver

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
3 years agoi2c, davinci: move i2c_defs.h to the drivers/i2c directory
Karicheri, Muralidharan [Fri, 4 Apr 2014 17:16:51 +0000 (13:16 -0400)]
i2c, davinci: move i2c_defs.h to the drivers/i2c directory

This patch moves the davinci i2c_defs.h file to drivers.i2c directory.
It will allow to reuse the davinci_i2c driver for TI Keystone2 SOCs.

Not used "git mv" command to move the file because small part of
it with definitions specific for Davinci SOCs has to remain in the
arch/arm/include/asm/arch-davinci.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Tom Rini <trini@ti.com>
3 years agoNAND: DaVinci: allow forced disable of subpage writes
Karicheri, Muralidharan [Fri, 4 Apr 2014 17:16:50 +0000 (13:16 -0400)]
NAND: DaVinci: allow forced disable of subpage writes

This patch introduces a configurable mechanism to disable
subpage writes in the DaVinci NAND driver.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Tom Rini <trini@ti.com>
3 years agoarm: add support for arch timer
Vitaly Andrianov [Fri, 4 Apr 2014 17:16:49 +0000 (13:16 -0400)]
arm: add support for arch timer

This patch add basic support for the architecture timer found on recent
ARMv7 based SoCs.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
3 years agotools: mkimage: add support for gpimage format
Karicheri, Muralidharan [Fri, 4 Apr 2014 17:16:48 +0000 (13:16 -0400)]
tools: mkimage: add support for gpimage format

This patch add support for gpimage format as a preparatory
patch for porting u-boot for keystone2 devices and is
based on omapimage format. It re-uses gph header to store the
size and loadaddr as done in omapimage.c

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Tom Rini <trini@ti.com>
3 years agofdt: call ft_board_setup_ex() at the end of image_setup_libfdt()
Vitaly Andrianov [Fri, 4 Apr 2014 17:16:47 +0000 (13:16 -0400)]
fdt: call ft_board_setup_ex() at the end of image_setup_libfdt()

The keystone2 SOC requires to fix all 32 bit aliased addresses
to their 36 physical format. This has to happen after all fdt
nodes are added or modified.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Tom Rini <trini@ti.com>
3 years agoTI:omap3: Convert omap3_beagle to ti_omap3_common.h
Tom Rini [Thu, 3 Apr 2014 19:17:15 +0000 (15:17 -0400)]
TI:omap3: Convert omap3_beagle to ti_omap3_common.h

Convert to using the common config files.  This requires a little more
flexibility in the common files than we had been using before.

Signed-off-by: Tom Rini <trini@ti.com>
3 years agoTI:armv7: Switch to CONFIG_SYS_BOARD_GENERIC
Tom Rini [Thu, 3 Apr 2014 19:17:14 +0000 (15:17 -0400)]
TI:armv7: Switch to CONFIG_SYS_BOARD_GENERIC

Tested on AM335x GP EVM, AM335x EVM SK, Beaglebone White, Beaglebone
Black, AM437xx GP EVM, OMAP5 uEVM, OMAP4 Pandaboard

Signed-off-by: Tom Rini <trini@ti.com>
3 years agodra7xx_evm: Add QSPI_4 support, qspiboot build target
Tom Rini [Thu, 3 Apr 2014 11:52:56 +0000 (07:52 -0400)]
dra7xx_evm: Add QSPI_4 support, qspiboot build target

We previously only supported QSPI_1 (single) support.  Add QSPI_4 (quad)
read support as well.  This means we can be given one of two boot device
values, but don't care which it is, so perform a fixup on the QSPI_4
value.  We add a qspiboot build target to better show how you would use
QSPI as a boot device in deployment.  When we boot from QSPI, we can
check the environment for 'boot_os' to control Falcon Mode.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
3 years agoSPL:SPI: Add Falcon Mode support
Tom Rini [Thu, 3 Apr 2014 11:52:55 +0000 (07:52 -0400)]
SPL:SPI: Add Falcon Mode support

Signed-off-by: Tom Rini <trini@ti.com>
3 years agoam335x_evm: Drop SPI SPL support from the default build
Tom Rini [Thu, 17 Apr 2014 21:23:25 +0000 (17:23 -0400)]
am335x_evm: Drop SPI SPL support from the default build

This is only useful with the _spiboot build target anyhow, so only
include it then.  Drop CONFIG_SPL_OS_BOOT support then as the flash is
small and didn't include a spot for the device tree already.

Signed-off-by: Tom Rini <trini@ti.com>
3 years agospi: ti_qspi: Add delay for successful bulk erase.
Poddar, Sourav [Thu, 3 Apr 2014 11:52:54 +0000 (07:52 -0400)]
spi: ti_qspi: Add delay for successful bulk erase.

Bulk erase is not happening properly on dra7 due to erase timing constraints,
add a delay so that erase timing constraints are properly met.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Tested-by: Yebio Mesfin <ymesfin@ti.com>
3 years agoTI:armv7: Change Falcon Mode DT load address
Tom Rini [Thu, 3 Apr 2014 11:52:53 +0000 (07:52 -0400)]
TI:armv7: Change Falcon Mode DT load address

In general, we want to load the DT at base+128MB, so that we ahve
sufficient room for the kernel and a larger device tree.  In the case of
OMAP3, use 64MB instead as we have a number of boards with 128MB DDR.

Signed-off-by: Tom Rini <trini@ti.com>
3 years agoTI:omap5: Move CONFIG_ENV_SIZE to board config files
Tom Rini [Thu, 3 Apr 2014 11:52:52 +0000 (07:52 -0400)]
TI:omap5: Move CONFIG_ENV_SIZE to board config files

The size of the environment depends on the backing store, move this to
the board config files.

Signed-off-by: Tom Rini <trini@ti.com>
3 years agoam43xx_evm: Update the ramdisk args, we pass things in just fine via DT
Tom Rini [Fri, 28 Mar 2014 19:03:31 +0000 (15:03 -0400)]
am43xx_evm: Update the ramdisk args, we pass things in just fine via DT

Signed-off-by: Tom Rini <trini@ti.com>
3 years agoam335x_evm: Update the ramdisk args, we pass things in just fine via DT
Tom Rini [Fri, 28 Mar 2014 19:03:30 +0000 (15:03 -0400)]
am335x_evm: Update the ramdisk args, we pass things in just fine via DT

Signed-off-by: Tom Rini <trini@ti.com>
3 years agoTI: Add, use a DEFAULT_LINUX_BOOT_ENV environment string
Tom Rini [Fri, 28 Mar 2014 19:03:29 +0000 (15:03 -0400)]
TI: Add, use a DEFAULT_LINUX_BOOT_ENV environment string

To deal with a reoccurring problem properly we need to specify addresses
for the Linux kernel, Flatted Device Tree and ramdisk that obey the
constraints within the kernel's Documentation/arm/Booting file but also
make sure that we relocate things within a valid address range.

It is possible with these addresses to also set fdt_high and initrd_high
to the value of 0xffffffff.  We don't do this by default to allow for
the most likely success of people using custom addresses however.

Signed-off-by: Tom Rini <trini@ti.com>
3 years agospl_mmc/CONFIG_SPL_OS_BOOT: Allow environment to determine what to boot
Tom Rini [Fri, 28 Mar 2014 16:03:42 +0000 (12:03 -0400)]
spl_mmc/CONFIG_SPL_OS_BOOT: Allow environment to determine what to boot

We add two new environment variables, falcon_args_file and
falcon_image_file, which when set will override the compiled in default
values for falcon mode.

Signed-off-by: Tom Rini <trini@ti.com>
3 years agoa3m071: Make spl_start_uboot test like getenv_yesno does
Tom Rini [Fri, 28 Mar 2014 16:03:41 +0000 (12:03 -0400)]
a3m071: Make spl_start_uboot test like getenv_yesno does

This change makes the behaviour slightly more rebust and will match
other implementations which can use getenv_yesno directly.

Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
3 years agoREADME.falcon: Document environment variables for falcon mode
Tom Rini [Fri, 28 Mar 2014 16:03:40 +0000 (12:03 -0400)]
README.falcon: Document environment variables for falcon mode

Signed-off-by: Tom Rini <trini@ti.com>
3 years agoREADME: Add CONFIG_SPL_OS_BOOT to README
Tom Rini [Fri, 28 Mar 2014 16:03:39 +0000 (12:03 -0400)]
README: Add CONFIG_SPL_OS_BOOT to README

Signed-off-by: Tom Rini <trini@ti.com>
3 years agoam335x_evm: Make SPL_OS also check the boot_os variable for falcon mode
Tom Rini [Fri, 28 Mar 2014 16:03:38 +0000 (12:03 -0400)]
am335x_evm: Make SPL_OS also check the boot_os variable for falcon mode

We use the same variable as a3m071 in the environment to determine if we
should boot into Linux or U-Boot.  This is useful on boards like
Beaglebone Black or AM335x GP EVM where we have persistent storage for
the environment.

Signed-off-by: Tom Rini <trini@ti.com>
3 years agomtd: Build nand_util.o for CONFIG_ENV_IS_IN_NAND in SPL
Tom Rini [Fri, 28 Mar 2014 16:03:37 +0000 (12:03 -0400)]
mtd: Build nand_util.o for CONFIG_ENV_IS_IN_NAND in SPL

Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Tom Rini <trini@ti.com>
3 years agomtd: Add a CONFIG_SPL_MTD_SUPPORT for a more full NAND subsystem in SPL
Tom Rini [Fri, 28 Mar 2014 16:03:36 +0000 (12:03 -0400)]
mtd: Add a CONFIG_SPL_MTD_SUPPORT for a more full NAND subsystem in SPL

This mainly converts the am335x_spl_bch driver to the "normal" format
which means a slight change to nand_info within the driver.

Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Tom Rini <trini@ti.com>
3 years agoenv_mmc.c: Remove NULL check on tmp_env1/2
Tom Rini [Fri, 28 Mar 2014 16:03:35 +0000 (12:03 -0400)]
env_mmc.c: Remove NULL check on tmp_env1/2

With 452a272 we moved to allocating these variables on the stack.  So
they will never now be NULL so remove these checks.

Signed-off-by: Tom Rini <trini@ti.com>
3 years agoenv_mmc.c: Allow environment to be used within SPL
Tom Rini [Fri, 28 Mar 2014 16:03:34 +0000 (12:03 -0400)]
env_mmc.c: Allow environment to be used within SPL

Inside of SPL we only concern ourself with one MMC device, so instead of
being able to use CONFIG_SYS_MMC_ENV_DEV we need to use 0 in SPL.
Switch the code to use a 'dev' variable to facilitate this.

Signed-off-by: Tom Rini <trini@ti.com>
3 years agofw_env.c: Switch get_config to use '%ms' in sscanf
Tom Rini [Fri, 28 Mar 2014 16:03:33 +0000 (12:03 -0400)]
fw_env.c: Switch get_config to use '%ms' in sscanf

We currently limit ourself to 16 characters for the device name to read
the environment from.  This is insufficient for /dev/mmcblk0boot1 to
work for example.  Switch to '%ms' which gives us a dynamically
allocated buffer instead.  We're short lived enough to not bother
free()ing the buffer.

Signed-off-by: Tom Rini <trini@ti.com>
3 years agoOMAP3: beagle-xm: generate fake USB ethernet MAC address from dieid
Nishanth Menon [Fri, 28 Mar 2014 16:00:06 +0000 (11:00 -0500)]
OMAP3: beagle-xm: generate fake USB ethernet MAC address from dieid

Similar to OMAP5uEVM, PandaBoard, BeagleBoard-XM has a USB based
ethernet without MAC address embedded. So fake a MAC address following
the similar strategy used on OMAP5 and PandaBoard family.

Signed-off-by: Nishanth Menon <nm@ti.com>
3 years agoomap3/sys_info: provide interface to read die id
Nishanth Menon [Fri, 28 Mar 2014 16:00:05 +0000 (11:00 -0500)]
omap3/sys_info: provide interface to read die id

introduce get_die_id() function which allows generation of
information such as fake MAC address from the processor ID code.

Signed-off-by: Nishanth Menon <nm@ti.com>
3 years agoOMAP: common: consolidate fake USB ethernet MAC address creation
Nishanth Menon [Fri, 28 Mar 2014 16:00:04 +0000 (11:00 -0500)]
OMAP: common: consolidate fake USB ethernet MAC address creation

TI platforms such as OMAP5uevm, PandaBoard, use equivalent
logic to generate fake USB MAC address from device unique DIE ID.

Consolidate this to a generic location such that other TI platforms such
as BeagleBoard-XM can also use the same.

NOTE: at this point in time, I dont yet see a need for a generic dummy
ethernet MAC address creation function, but if there is a need in the
future, this can be further abstracted out.

Signed-off-by: Nishanth Menon <nm@ti.com>
3 years agoARM: OMAP: replace custom sr32() by standard I/O accessors
Wolfgang Denk [Tue, 25 Mar 2014 13:49:50 +0000 (14:49 +0100)]
ARM: OMAP: replace custom sr32() by standard I/O accessors

Replace the custom bit manipulation function sr32() by standard I/O
accessors.  A major motivation for this cleanup was the fact, that a
number of calls of that function resulted in 32 bit wide shift
operations on u32 data, which according to the C-ISO/IEC-9899-Standard
provokes undefined behaviour:

6.5.7 Bitwise shift operators
...
        If the value of the right operand is negative or is greater
        than or equal to the width of the promoted left operand, the
        behavior is undefined.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
3 years agoARM: OMAP: hide custom bit manipulation function sr32()
Wolfgang Denk [Tue, 25 Mar 2014 13:49:49 +0000 (14:49 +0100)]
ARM: OMAP: hide custom bit manipulation function sr32()

The only remaining user of the custom bit manipulation function sr32()
is arch/arm/cpu/armv7/omap3/clock.c, so  make it a static function in
that file to prepare complete removal.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
3 years agoARM: OMAP: remove sr32() from OMAP board code
Wolfgang Denk [Tue, 25 Mar 2014 13:49:48 +0000 (14:49 +0100)]
ARM: OMAP: remove sr32() from OMAP board code

Replace the custom sr32() bit manipulation function in
arch/arm/cpu/armv7/omap3/board.c and board/ti/panda/panda.c
by standard I/O accessors.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
3 years agoARM: tegra: pack pinmux data tables tighter
Stephen Warren [Fri, 21 Mar 2014 21:58:03 +0000 (15:58 -0600)]
ARM: tegra: pack pinmux data tables tighter

Use smaller fields in the Tegra pinmux structures in order to pack the
data tables into a smaller space. This saves around 1-3KB for the SPL
and around 3-8KB for the main build of U-Boot, depending on the board,
which SoC it uses, and how many pinmux table entries there are.

In order to pack PMUX_FUNC_* into a smaller space, don't hard-code the
values of PMUX_FUNC_RSVD* to values which require 16 bits to store them,
but instead let their values be assigned automatically, so they end up
fitting into 8 bits.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agousb: tegra: combine header file
Stefan Agner [Sun, 2 Mar 2014 18:46:50 +0000 (19:46 +0100)]
usb: tegra: combine header file

Combine the Tegra USB header file into one header file for all SoCs.
Use ifdef to account for the difference, especially Tegra20 is quite
different from newer SoCs. This avoids duplication, mainly for
Tegra30 and newer devices.

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agousb: tegra: fix PHY configuration
Stefan Agner [Sun, 2 Mar 2014 18:46:49 +0000 (19:46 +0100)]
usb: tegra: fix PHY configuration

On Tegra30 and later, the PTS (parallel transceiver select) and STS
(serial transceiver select) are part of the HOSTPC1_DEVLC_0 register
rather than PORTSC1_0 register. Since the reset configuration
usually matches the intended configuration, this error did not show
up on Tegra30 devices.

Also use the slightly different bit fields of first USB, (USBD) on
Tegra20 and move those definitions to the Tegra20 specific header
file.

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agousb: tegra: fix USB2 powerdown for Tegra30 and later
Stefan Agner [Sun, 2 Mar 2014 18:46:48 +0000 (19:46 +0100)]
usb: tegra: fix USB2 powerdown for Tegra30 and later

Clear the forced powerdown bit in the UTMIP_PLL_CFG2_0 register
which brings USB2 in UTMI mode to work. This was clearly missing
since the forced powerdown bit is set in reset by default for all
USB ports.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agoARM: tegra: add Jetson TK1 board
Stephen Warren [Tue, 25 Mar 2014 17:39:33 +0000 (11:39 -0600)]
ARM: tegra: add Jetson TK1 board

Jetson TK1 is an NVIDIA Tegra124 reference board, which shares much of
its design with Venice2.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agoARM: tegra: Tegra124 pinmux cleanup
Stephen Warren [Fri, 21 Mar 2014 18:29:01 +0000 (12:29 -0600)]
ARM: tegra: Tegra124 pinmux cleanup

This renames all the pinmux pins, drive groups, and functions so they
have a prefix which matches the type name. These lists are also auto-
generated using scripts that were also used to generate the kernel
pinctrl drivers. This ensures that the lists are consistent between the
two.

The entries in tegra124_pingroups[] are all updated to remove the columns
which are no longer used.

All affected code is updated to match.

There are differences in the set of drive groups. I have validated this
against the TRM. There are differences order of pin definitions in
pinmux.c; these previously had significant mismatches with the correct
order:-( I adjusted a few entries in pinmux-config-venice2.h since the
set of legal functions for some pins was updated to match the TRM.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agoARM: tegra: Tegra114 pinmux cleanup
Stephen Warren [Fri, 21 Mar 2014 18:29:00 +0000 (12:29 -0600)]
ARM: tegra: Tegra114 pinmux cleanup

This renames all the pinmux pins, drive groups, and functions so they
have a prefix which matches the type name. These lists are also auto-
generated using scripts that were also used to generate the kernel
pinctrl drivers. This ensures that the lists are consistent between the
two.

The entries in tegra114_pingroups[] are all updated to remove the columns
which are no longer used.

All affected code is updated to match.

This introduces a few changes to pin/group/function naming and the set of
available functions for each pin. The new values now exactly match the
TRM; the chip documentation. I adjusted a few entries in
pinmux-config-dalmore.h due to this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agoARM: tegra: Tegra30 pinmux cleanup
Stephen Warren [Fri, 21 Mar 2014 18:28:59 +0000 (12:28 -0600)]
ARM: tegra: Tegra30 pinmux cleanup

This renames all the pinmux pins, drive groups, and functions so they
have a prefix which matches the type name. These lists are also auto-
generated using scripts that were also used to generate the kernel
pinctrl drivers. This ensures that the lists are consistent between the
two.

The entries in tegra30_pingroups[] are all updated to remove the columns
which are no longer used.

All affected code is updated to match.

This introduces a few changes to pin/group/function naming and the set of
available functions for each pin. The new values now exactly match the
TRM; the chip documentation. I adjusted one entry in
pinmux-config-cardhu.h due to this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agoARM: tegra: Tegra20 pinmux cleanup
Stephen Warren [Fri, 21 Mar 2014 18:28:58 +0000 (12:28 -0600)]
ARM: tegra: Tegra20 pinmux cleanup

This renames all the Tegra20 pinmux pins and functions so they have a
prefix which matches the type name.

The entries in tegra20_pingroups[] are all updated to remove the columns
which are no longer used.

All affected code is updated to match.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agoARM: tegra: pinmux naming consistency fixes
Stephen Warren [Fri, 21 Mar 2014 18:28:56 +0000 (12:28 -0600)]
ARM: tegra: pinmux naming consistency fixes

Clean up the naming of pinmux-related objects:
* Refer to drive groups rather than pad groups to match the Linux kernel.
* Ensure all pinmux API types are prefixed with pmux_, values (defines)
  are prefixed with PMUX_, and functions prefixed with pinmux_.
* Modify a few type names to make their content clearer.
* Minimal changes to SoC-specific .h/.c files are made so the code still
  compiles. A separate per-SoC change will be made immediately following,
  in order to keep individual patch size down.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agoARM: tegra: reduce public pinmux API
Stephen Warren [Fri, 21 Mar 2014 18:28:55 +0000 (12:28 -0600)]
ARM: tegra: reduce public pinmux API

Remove a few unused functions from the pinmux header. They aren't
currently used, and removing them prevents any new usage from appearing.
This will ease moving to just pinmux_config_table() and
padgrp_config_table() in the future.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agoARM: tegra: pinctrl: remove duplication
Stephen Warren [Fri, 21 Mar 2014 18:28:54 +0000 (12:28 -0600)]
ARM: tegra: pinctrl: remove duplication

Much of arch/arm/cpu/tegra*-common/pinmux.c is identical. Remove the
duplication by creating pinmux-common.c for all the identical code.

This leaves:
* arch/arm/include/asm/arch-tegra*/pinmux.h defining only the names of
  the various pins/pin groups, drive groups, and mux functions.
* arch/arm/cpu/tegra*-common/pinmux.c containing only the lookup table
  stating which pin groups support which mux functions.

The code in pinmux-common.c is semantically identical to that in the
various original pinmux.c, but had some consistency and cleanup fixes
applied during migration.

I removed the definition of struct pmux_tri_ctlr, since this is different
between SoCs (especially Tegra20 vs all others), and it's much simpler to
deal with this via the new REG/MUX_REG/... defines. spl.c, warmboot.c,
and warmboot_avp.c needed updates due to this, since they previously
hijacked this struct to encode the location of some non-pinmux registers.
Now, that code simply calculates these register addresses directly using
simple and obvious math. I like this method better irrespective of the
pinmux code cleanup anyway.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agoARM: tegra: use apb_misc.h in more places
Stephen Warren [Fri, 21 Mar 2014 18:28:53 +0000 (12:28 -0600)]
ARM: tegra: use apb_misc.h in more places

Tegra's "APB misc" register region contains various miscellaneous
registers and the Tegra pinmux registers. Some code that touches the
misc registers currently uses struct pmux_tri_ctlr, which is intended to
be a definition of pinmux registers, rather than struct apb_misc_pp_ctrl,
which is intended to be a definition of the miscellaneous registers.
Convert all such code to use struct apb_misc_pp_ctrl, since struct
pmux_tri_ctlr goes away in the next patch.

This requires adding a missing field definition to struct
apb_misc_pp_ctrl, and moving the header into a more common location.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agoARM: tegra: prototype pinmux_init() in board.h
Stephen Warren [Fri, 21 Mar 2014 18:28:52 +0000 (12:28 -0600)]
ARM: tegra: prototype pinmux_init() in board.h

pinmux_init() is a board-level function, not a pinmux driver function.
Move the prototype to a board header rather than the driver header.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agoARM: tegra: pinctrl: make pmux_func values consistent on Tegra20
Stephen Warren [Fri, 21 Mar 2014 18:28:51 +0000 (12:28 -0600)]
ARM: tegra: pinctrl: make pmux_func values consistent on Tegra20

For consistency with other SoCs, modify Tegra20's enum pmux_func to:

* Remove PMUX_FUNC values that aren't real
* Use the same PMUX_FUNC_RSVD[1-4] values, and ensure (RSVD1 & 3)==0;
  this will be assumed by pinmux_set_func() in a future patch.

Unfortunately, PMUX_FUNC_RSVD is still used in the pin macros. Use a
private define inside the driver to prevent this from causing compilaton
errors. This will be cleaned up when the pin tables are re-written in a
later patch in this series.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agoARM: tegra: pinctrl: remove vddio
Stephen Warren [Fri, 21 Mar 2014 18:28:50 +0000 (12:28 -0600)]
ARM: tegra: pinctrl: remove vddio

This field isn't used anywhere, so remove it. Note that PIN() macros are
left unchanged for now, to avoid many diffs to them; later commits will
completely rewrite them just one time.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agoARM: tegra: pinctrl: remove func_safe
Stephen Warren [Fri, 21 Mar 2014 18:28:49 +0000 (12:28 -0600)]
ARM: tegra: pinctrl: remove func_safe

This field isn't used anywhere, so remove it. Note that PIN() macros are
left unchanged for now, to avoid many diffs to them; later commits will
completely rewrite them just one time.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
3 years agoPrepare v2014.04
Tom Rini [Mon, 14 Apr 2014 19:19:24 +0000 (15:19 -0400)]
Prepare v2014.04

Signed-off-by: Tom Rini <trini@ti.com>
3 years agoarm: kzm9g: Add CONFIG_SYS_GENERIC_BOARD
Tetsuyuki Kobayashi [Mon, 14 Apr 2014 08:13:58 +0000 (17:13 +0900)]
arm: kzm9g: Add CONFIG_SYS_GENERIC_BOARD

Add CONFIG_SYS_GENERIC_BOARD to use common/board_[fr].c for kzm9g.

Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
3 years agoi2c: sh_i2c: bugfix: i2c probe command does not work
Tetsuyuki Kobayashi [Mon, 14 Apr 2014 08:13:57 +0000 (17:13 +0900)]
i2c: sh_i2c: bugfix: i2c probe command does not work

This is regression of commit 2035d77d i2c: sh_i2c: Update to new CONFIG_SYS_I2C framework

Before commit 2035d77d, i2c probe command works properly on kzm9g board.

KZM-A9-GT# i2c probe
Valid chip addresses: 0C 12 1D 32 39 3D 40 60

After commit 2035d77d, i2c probe command does not work.

KZM-A9-GT# i2c probe
Valid chip addresses: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F

sh_i2c_probe() calls sh_i2c_read(), but read length is 0. So acutally it does not read device at all. This patch prepares dummy buffer and read data into it.

Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
3 years agoboard:tricorder: fixup SPL OOB layout
Andreas Bießmann [Thu, 10 Apr 2014 10:52:52 +0000 (12:52 +0200)]
board:tricorder: fixup SPL OOB layout

Commit d016dc42cedbf6102e100fa9ecb58462edfb14f8 changed the layout of BCH8 SW
on omap3 boards. We need to adopt the ecc layout for the nand_spl_simle
driver to avoid wrong ecc errors.

Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
Cc: Thomas Weber <thomas.weber@corscience.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
3 years agoboard:tricorder: enable omap_gpio clocks
Andreas Bießmann [Thu, 10 Apr 2014 10:52:51 +0000 (12:52 +0200)]
board:tricorder: enable omap_gpio clocks

Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
Cc: Thomas Weber <thomas.weber@corscience.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
3 years agoboard:tricorder: always work with valid eeprom data
Andreas Bießmann [Thu, 10 Apr 2014 10:52:50 +0000 (12:52 +0200)]
board:tricorder: always work with valid eeprom data

Commit 890880583d84607e36b52a785a96b167728bbf73 introduced EEPROM parsing and
board detection but faild to return a valid tricorder_eeprom struct for backup
case.  When pressing S200 while reading EEPROM we ignore the value. We
returned falsely a tricorder_eeprom struct with uninitialized data which is
just garbage.
Initialize it by zeroing the whole structure.

Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
Cc: Thomas Weber <thomas.weber@corscience.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
3 years agoarm:board:trats2:FIX: Clear INFORM4 and INFORM5 registers at correct boot
Łukasz Majewski [Wed, 9 Apr 2014 13:09:44 +0000 (15:09 +0200)]
arm:board:trats2:FIX: Clear INFORM4 and INFORM5 registers at correct boot

During switch to device tree, commit 1ecab0f has removed this code.

INFORM4 and INFORM5 registers are used by TRATS2 first stage bootloader for
providing recovery. For normal operation, those two must be cleared out.

This error emerges when one force reset from u-boot's command line for
three times.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
3 years agokbuild: fix a bug in regeneration of linker scripts
Masahiro Yamada [Wed, 9 Apr 2014 11:10:43 +0000 (20:10 +0900)]
kbuild: fix a bug in regeneration of linker scripts

In some use cases, SPL linker script was not updated even when
it should be.

For instance,

  $ make tricoder_config all
    [ build complete ]
  ... modify include/configs/tricoder.h
  $ make

spl/u-boot-spl.lds should be updated in this case, but it wasn't.

To fix this problem, linker scripts generation should be handled
by $(call if_changed_dep,...) rather than by $(call if_changed,...).

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reported-by: Andreas Bießmann <andreas.devel@googlemail.com>
Tested-by: Andreas Bießmann <andreas.devel@googlemail.com>
3 years agoMerge branch 'u-boot/master' into 'u-boot-arm/master'
Albert ARIBAUD [Tue, 8 Apr 2014 07:25:08 +0000 (09:25 +0200)]
Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
arch/arm/cpu/arm926ejs/mxs/Makefile
include/configs/trats.h
include/configs/trats2.h
include/mmc.h

3 years agoarm64 patch: gicv3 support
David Feng [Fri, 14 Mar 2014 06:26:27 +0000 (14:26 +0800)]
arm64 patch: gicv3 support

This patch add gicv3 support to uboot armv8 platform.

Changes for v2:
  - rename arm/cpu/armv8/gic.S with arm/lib/gic_64.S
  - move smp_kick_all_cpus() from gic.S to start.S, it would be
    implementation dependent.
  - Each core initialize it's own ReDistributor instead of master
    initializeing all ReDistributors. This is advised by arnab.basu
    <arnab.basu@freescale.com>.

Signed-off-by: David Feng <fenghua@phytium.com.cn>
3 years agobootstage: arm: fix fdt stashing code
Mela Custodio [Wed, 19 Feb 2014 15:16:56 +0000 (00:16 +0900)]
bootstage: arm: fix fdt stashing code

The conditional is using a variable that is not defined.

Signed-off-by: Rommel G Custodio <sessyargc+u-boot@gmail.com>
3 years agoARMv8: fix bug for flush data cache by set/way
Leo Yan [Mon, 31 Mar 2014 01:50:35 +0000 (09:50 +0800)]
ARMv8: fix bug for flush data cache by set/way

When flush the d$ with set/way instruction, it need calculate the way's
offset = log2(Associativity); but in current uboot's code, it use below
formula to calculate the offset: log2(Associativity * 2 - 1), so finally
it cannot flush data cache properly.

Signed-off-by: Leo Yan <leoy@marvell.com>
3 years agoarmv8: Flush dcache before switching to EL2
York Sun [Mon, 31 Mar 2014 21:40:32 +0000 (14:40 -0700)]
armv8: Flush dcache before switching to EL2

For ARMv8, U-boot has been running at EL3 with cache and MMU enabled.
Without proper setup for EL2, cache and MMU are both disabled (out of
reset). Before switching, we need to flush the dcache to make sure the
data is in the main memory.

Signed-off-by: York Sun <yorksun@freescale.com>
Acked-by: David.Feng <fenghua@phytium.com.cn>
3 years agoarm: vf610: fix double iomux configuration for vf610twr board
Marcel Ziswiler [Tue, 11 Mar 2014 17:44:00 +0000 (18:44 +0100)]
arm: vf610: fix double iomux configuration for vf610twr board

Get rid of double VF610_PAD_DDR_A15__DDR_A_15 iomux configuration.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
3 years agoarm: vf610: add enet1 support
Marcel Ziswiler [Tue, 11 Mar 2014 17:43:59 +0000 (18:43 +0100)]
arm: vf610: add enet1 support

This patch contains several changes required for second Ethernet
(enet1/RMII1) port on vf610
- ANADIG PLL5 control definitions required for Ethernet RMII1 clock
- Secondary Ethernet (enet1) MAC RMII1 base address definition
- RMII1 iomux definitions
- VF610_PAD_PTA6__RMII0_CLKOUT iomux definition required for
  internal (e.g. crystal-less) Ethernet clocking.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
[stefan@agner.ch: regrouped patch]
Signed-off-by: Stefan Agner <stefan@agner.ch>
3 years agoarm: vf610: add uart0 clock/iomux definitions
Marcel Ziswiler [Tue, 11 Mar 2014 17:43:58 +0000 (18:43 +0100)]
arm: vf610: add uart0 clock/iomux definitions

Add CCM_CCGR0_UART0_CTRL_MASK clock definition and add TX/RX iomux
definitions for UART0 (aka. SCI0).

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
[stefan@agner.ch: regrouped patch]
Signed-off-by: Stefan Agner <stefan@agner.ch>
3 years agoarm: vf610: fix anadig register struct
Marcel Ziswiler [Tue, 11 Mar 2014 17:43:57 +0000 (18:43 +0100)]
arm: vf610: fix anadig register struct

The anadig_reg structure started at the wrong offset (fixed by adding
reserved_0x000[4]), was missing some reserved field required for
alignment purpose (reserved_0x094[3] between pll4_denom and pll6_ctrl)
and further contained a too short reserved field causing further miss-
alignment (reserved_0x0C4[7]). Also, rename all the reserved fields
and using a memory offset based scheme for.

Discovered and tested by temporarily putting the following debug
instrumentation into board_init():
    struct anadig_reg *anadig = (struct anadig_reg *)ANADIG_BASE_ADDR;
    printf("&anadig->pll3_ctrl=0x%p\n", &anadig->pll3_ctrl);
    printf("&anadig->pll5_ctrl=0x%p\n", &anadig->pll5_ctrl);

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
[stefan@agner.ch: regrouped patch]
Signed-off-by: Stefan Agner <stefan@agner.ch>
3 years agobuild:arm: Remove setting of CROSS_COMPILE environment variable
Łukasz Majewski [Tue, 18 Mar 2014 15:46:48 +0000 (16:46 +0100)]
build:arm: Remove setting of CROSS_COMPILE environment variable

After Kbuild introduction, the CROSS_COMPILE environment variable has been
set to some default value (prefix arm-linux-).

This shall be removed since it breaks building u-boot for native arm target
(like qemu ARM).
Moreover not all compilers have arm-linux- prefix.

Additionally the u-boot cross compiles with CROSS_COMPILE= set explicitly-
e.g.:
CROSS_COMPILE=/ .... /arm-v7a-linux-gnueabi- make

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
3 years agoMerge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Albert ARIBAUD [Mon, 7 Apr 2014 17:13:42 +0000 (19:13 +0200)]
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

3 years agoMX6: Enable ARM errata workaround 794072 and 761320
Nitin Garg [Wed, 2 Apr 2014 13:55:03 +0000 (08:55 -0500)]
MX6: Enable ARM errata workaround 794072 and 761320

Since MX6 is Cortex-A9 r2p10, enable software workaround
for errata 794072 and 761320.

Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
3 years agoARM: Add workaround for Cortex-A9 errata 761320
Nitin Garg [Wed, 2 Apr 2014 13:55:02 +0000 (08:55 -0500)]
ARM: Add workaround for Cortex-A9 errata 761320

Full cache line writes to the same memory region from at least two
processors might deadlock the processor. Exists on r1, r2, r3
revisions.

Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
3 years agoARM: Add workaround for Cortex-A9 errata 794072
Nitin Garg [Wed, 2 Apr 2014 13:55:01 +0000 (08:55 -0500)]
ARM: Add workaround for Cortex-A9 errata 794072

A short loop including a DMB instruction might cause a denial of
service on another processor which executes a CP15 broadcast operation.
Exists on r1, r2, r3, r4 revisions.

Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
3 years agoarmv8/cache: Change cache invalidate and flush function
York Sun [Wed, 26 Feb 2014 21:26:04 +0000 (13:26 -0800)]
armv8/cache: Change cache invalidate and flush function

When SoC first boots up, we should invalidate the cache but not flush it.
We can use the same function for invalid and flush mostly, with a wrapper.

Invalidating large cache can ben slow on emulator, so we postpone doing
so until I-cache is enabled, and before enabling D-cache.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: David Feng <fenghua@phytium.com.cn>
3 years agoarmv8/cache: Flush D-cache, invalidate I-cache for relocation
York Sun [Wed, 26 Feb 2014 21:26:03 +0000 (13:26 -0800)]
armv8/cache: Flush D-cache, invalidate I-cache for relocation

If D-cache is enabled, we need to flush it, and invalidate i-cache before
jumping to the new location. This should be done right after relocation.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: David Feng <fenghua@phytium.com.cn>
3 years agoarmv8/cache: Consolidate setting for MAIR and TCR
York Sun [Wed, 26 Feb 2014 21:26:02 +0000 (13:26 -0800)]
armv8/cache: Consolidate setting for MAIR and TCR

Move setting for MAIR and TCR to cache_v8.c, to avoid conflict with
sub-architecture.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: David Feng <fenghua@phytium.com.cn>
3 years agoarm: Handle .gnu.hash section in ldscripts
Andreas Färber [Mon, 27 Jan 2014 04:48:11 +0000 (05:48 +0100)]
arm: Handle .gnu.hash section in ldscripts

Avoids "could not find output section .gnu.hash" ld.bfd errors on openSUSE.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
3 years agosocfpga: Adding Clock Manager driver
Chin Liang See [Wed, 5 Mar 2014 04:13:53 +0000 (22:13 -0600)]
socfpga: Adding Clock Manager driver

Clock Manager driver will be called to reconfigure all the
clocks setting based on user input. The input are passed to
Preloader through handoff files

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Pavel Machek <pavel@denx.de>