v2.5.0.7 -> v2.5.0.8
[opensuse:kernel.git] / drivers / block / cciss.c
1 /*
2  *    Disk Array driver for Compaq SMART2 Controllers
3  *    Copyright 2000 Compaq Computer Corporation
4  *
5  *    This program is free software; you can redistribute it and/or modify
6  *    it under the terms of the GNU General Public License as published by
7  *    the Free Software Foundation; either version 2 of the License, or
8  *    (at your option) any later version.
9  *
10  *    This program is distributed in the hope that it will be useful,
11  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
12  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
14  *
15  *    You should have received a copy of the GNU General Public License
16  *    along with this program; if not, write to the Free Software
17  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18  *
19  *    Questions/Comments/Bugfixes to arrays@compaq.com
20  *
21  */
22
23 #include <linux/config.h>       /* CONFIG_PROC_FS */
24 #include <linux/module.h>
25 #include <linux/version.h>
26 #include <linux/types.h>
27 #include <linux/pci.h>
28 #include <linux/kernel.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/major.h>
32 #include <linux/fs.h>
33 #include <linux/blkpg.h>
34 #include <linux/timer.h>
35 #include <linux/proc_fs.h>
36 #include <linux/init.h> 
37 #include <linux/hdreg.h>
38 #include <linux/spinlock.h>
39 #include <asm/uaccess.h>
40 #include <asm/io.h>
41
42 #include <linux/blk.h>
43 #include <linux/blkdev.h>
44 #include <linux/genhd.h>
45
46 #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
47 #define DRIVER_NAME "Compaq CISS Driver (v 2.4.5)"
48 #define DRIVER_VERSION CCISS_DRIVER_VERSION(2,4,5)
49
50 /* Embedded module documentation macros - see modules.h */
51 MODULE_AUTHOR("Charles M. White III - Compaq Computer Corporation");
52 MODULE_DESCRIPTION("Driver for Compaq Smart Array Controller 5300");
53 MODULE_LICENSE("GPL");
54
55 #include "cciss_cmd.h"
56 #include "cciss.h"
57 #include <linux/cciss_ioctl.h>
58
59 /* define the PCI info for the cards we can control */
60 const struct pci_device_id cciss_pci_device_id[] = {
61         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS,
62                         0x0E11, 0x4070, 0, 0, 0},
63         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB,
64                         0x0E11, 0x4080, 0, 0, 0},
65         { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB,
66                         0x0E11, 0x4082, 0, 0, 0},
67         {0,}
68 };
69 MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
70
71 #define NR_PRODUCTS (sizeof(products)/sizeof(struct board_type))
72
73 /*  board_id = Subsystem Device ID & Vendor ID
74  *  product = Marketing Name for the board
75  *  access = Address of the struct of function pointers 
76  */
77 static struct board_type products[] = {
78         { 0x40700E11, "Smart Array 5300",       &SA5_access },
79         { 0x40800E11, "Smart Array 5i", &SA5B_access},
80         { 0x40820E11, "Smart Array 532", &SA5B_access},
81 };
82
83 /* How long to wait (in millesconds) for board to go into simple mode */
84 #define MAX_CONFIG_WAIT 1000 
85
86 #define READ_AHEAD       128
87 #define NR_CMDS          384 /* #commands that can be outstanding */
88 #define MAX_CTLR 8
89
90 #define CCISS_DMA_MASK  0xFFFFFFFF      /* 32 bit DMA */
91
92 static ctlr_info_t *hba[MAX_CTLR];
93
94 static struct proc_dir_entry *proc_cciss;
95
96 static void do_cciss_request(request_queue_t *q);
97 static int cciss_open(struct inode *inode, struct file *filep);
98 static int cciss_release(struct inode *inode, struct file *filep);
99 static int cciss_ioctl(struct inode *inode, struct file *filep, 
100                 unsigned int cmd, unsigned long arg);
101
102 static int revalidate_allvol(kdev_t dev);
103 static int revalidate_logvol(kdev_t dev, int maxusage);
104 static int frevalidate_logvol(kdev_t dev);
105
106 static void cciss_getgeometry(int cntl_num);
107
108 static inline void addQ(CommandList_struct **Qptr, CommandList_struct *c);
109 static void start_io( ctlr_info_t *h);
110
111 #ifdef CONFIG_PROC_FS
112 static int cciss_proc_get_info(char *buffer, char **start, off_t offset, 
113                 int length, int *eof, void *data);
114 static void cciss_procinit(int i);
115 #else
116 static int cciss_proc_get_info(char *buffer, char **start, off_t offset, 
117                 int length, int *eof, void *data) { return 0;}
118 static void cciss_procinit(int i) {}
119 #endif /* CONFIG_PROC_FS */
120
121 static struct block_device_operations cciss_fops  = {
122         owner:                  THIS_MODULE,
123         open:                   cciss_open, 
124         release:                cciss_release,
125         ioctl:                  cciss_ioctl,
126         revalidate:             frevalidate_logvol,
127 };
128
129 /*
130  * Report information about this controller.
131  */
132 #ifdef CONFIG_PROC_FS
133 static int cciss_proc_get_info(char *buffer, char **start, off_t offset, 
134                 int length, int *eof, void *data)
135 {
136         off_t pos = 0;
137         off_t len = 0;
138         int size, i, ctlr;
139         ctlr_info_t *h = (ctlr_info_t*)data;
140         drive_info_struct *drv;
141
142         ctlr = h->ctlr;
143         size = sprintf(buffer, "%s:  Compaq %s Controller\n"
144                 "       Board ID: 0x%08lx\n"
145                 "       Firmware Version: %c%c%c%c\n"
146                 "       Memory Address: 0x%08lx\n"
147                 "       IRQ: %d\n"
148                 "       Logical drives: %d\n"
149                 "       Current Q depth: %d\n"
150                 "       Max Q depth since init: %d\n"
151                 "       Max # commands on controller since init: %d\n"
152                 "       Max SG entries since init: %d\n\n",
153                 h->devname,
154                 h->product_name,
155                 (unsigned long)h->board_id,
156                 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2], h->firm_ver[3],
157                 (unsigned long)h->vaddr,
158                 (unsigned int)h->intr,
159                 h->num_luns, 
160                 h->Qdepth, h->maxQsinceinit, h->max_outstanding, h->maxSG);
161
162         pos += size; len += size;
163         for(i=0; i<h->num_luns; i++) {
164                 drv = &h->drv[i];
165                 size = sprintf(buffer+len, "cciss/c%dd%d: blksz=%d nr_blocks=%d\n",
166                                 ctlr, i, drv->block_size, drv->nr_blocks);
167                 pos += size; len += size;
168         }
169
170         size = sprintf(buffer+len, "nr_allocs = %d\nnr_frees = %d\n",
171                         h->nr_allocs, h->nr_frees);
172         pos += size; len += size;
173
174         *eof = 1;
175         *start = buffer+offset;
176         len -= offset;
177         if (len>length)
178                 len = length;
179         return len;
180 }
181
182 /*
183  * Get us a file in /proc/cciss that says something about each controller.
184  * Create /proc/cciss if it doesn't exist yet.
185  */
186 static void __init cciss_procinit(int i)
187 {
188         if (proc_cciss == NULL) {
189                 proc_cciss = proc_mkdir("cciss", proc_root_driver);
190                 if (!proc_cciss) 
191                         return;
192         }
193
194         create_proc_read_entry(hba[i]->devname, 0, proc_cciss,
195                         cciss_proc_get_info, hba[i]);
196 }
197 #endif /* CONFIG_PROC_FS */
198
199 /* 
200  * For operations that cannot sleep, a command block is allocated at init, 
201  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
202  * which ones are free or in use.  For operations that can wait for kmalloc 
203  * to possible sleep, this routine can be called with get_from_pool set to 0. 
204  * cmd_free() MUST be called with a got_from_pool set to 0 if cmd_alloc was. 
205  */ 
206 static CommandList_struct * cmd_alloc(ctlr_info_t *h, int get_from_pool)
207 {
208         CommandList_struct *c;
209         int i; 
210         u64bit temp64;
211         dma_addr_t cmd_dma_handle, err_dma_handle;
212
213         if (!get_from_pool)
214         {
215                 c = (CommandList_struct *) pci_alloc_consistent(
216                         h->pdev, sizeof(CommandList_struct), &cmd_dma_handle); 
217                 if(c==NULL)
218                         return NULL;
219                 memset(c, 0, sizeof(CommandList_struct));
220
221                 c->err_info = (ErrorInfo_struct *)pci_alloc_consistent(
222                                         h->pdev, sizeof(ErrorInfo_struct), 
223                                         &err_dma_handle);
224         
225                 if (c->err_info == NULL)
226                 {
227                         pci_free_consistent(h->pdev, 
228                                 sizeof(CommandList_struct), c, cmd_dma_handle);
229                         return NULL;
230                 }
231                 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
232         } else /* get it out of the controllers pool */ 
233         {
234                 do {
235                         i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS);
236                         if (i == NR_CMDS)
237                                 return NULL;
238                 } while(test_and_set_bit(i & 31, h->cmd_pool_bits+(i/32)) != 0);
239 #ifdef CCISS_DEBUG
240                 printk(KERN_DEBUG "cciss: using command buffer %d\n", i);
241 #endif
242                 c = h->cmd_pool + i;
243                 memset(c, 0, sizeof(CommandList_struct));
244                 cmd_dma_handle = h->cmd_pool_dhandle 
245                                         + i*sizeof(CommandList_struct);
246                 c->err_info = h->errinfo_pool + i;
247                 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
248                 err_dma_handle = h->errinfo_pool_dhandle 
249                                         + i*sizeof(ErrorInfo_struct);
250                 h->nr_allocs++;
251         }
252
253         c->busaddr = (__u32) cmd_dma_handle;
254         temp64.val = (__u64) err_dma_handle;    
255         c->ErrDesc.Addr.lower = temp64.val32.lower;
256         c->ErrDesc.Addr.upper = temp64.val32.upper;
257         c->ErrDesc.Len = sizeof(ErrorInfo_struct);
258         
259         c->ctlr = h->ctlr;
260         return c;
261
262
263 }
264
265 /* 
266  * Frees a command block that was previously allocated with cmd_alloc(). 
267  */
268 static void cmd_free(ctlr_info_t *h, CommandList_struct *c, int got_from_pool)
269 {
270         int i;
271         u64bit temp64;
272
273         if( !got_from_pool)
274         { 
275                 temp64.val32.lower = c->ErrDesc.Addr.lower;
276                 temp64.val32.upper = c->ErrDesc.Addr.upper;
277                 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct), 
278                         c->err_info, (dma_addr_t) temp64.val);
279                 pci_free_consistent(h->pdev, sizeof(CommandList_struct), 
280                         c, (dma_addr_t) c->busaddr);
281         } else 
282         {
283                 i = c - h->cmd_pool;
284                 clear_bit(i%32, h->cmd_pool_bits+(i/32));
285                 h->nr_frees++;
286         }
287 }
288
289 /*  
290  * fills in the disk information. 
291  */
292 static void cciss_geninit( int ctlr)
293 {
294         drive_info_struct *drv;
295         int i,j;
296         
297         /* Loop through each real device */ 
298         hba[ctlr]->gendisk.nr_real = 0; 
299         for(i=0; i< NWD; i++)
300         {
301                 drv = &(hba[ctlr]->drv[i]);
302                 if( !(drv->nr_blocks))
303                         continue;
304                 hba[ctlr]->hd[i << NWD_SHIFT].nr_sects = 
305                 hba[ctlr]->sizes[i << NWD_SHIFT] = drv->nr_blocks;
306
307                 /* for each partition */ 
308                 for(j=0; j<MAX_PART; j++)
309                         hba[ctlr]->blocksizes[(i<<NWD_SHIFT) + j] = 1024; 
310
311                 hba[ctlr]->gendisk.nr_real++;
312                 (BLK_DEFAULT_QUEUE(MAJOR_NR + ctlr))->hardsect_size = drv->block_size;
313         }
314 }
315 /*
316  * Open.  Make sure the device is really there.
317  */
318 static int cciss_open(struct inode *inode, struct file *filep)
319 {
320         int ctlr = MAJOR(inode->i_rdev) - MAJOR_NR;
321         int dsk  = MINOR(inode->i_rdev) >> NWD_SHIFT;
322
323 #ifdef CCISS_DEBUG
324         printk(KERN_DEBUG "cciss_open %x (%x:%x)\n", inode->i_rdev, ctlr, dsk);
325 #endif /* CCISS_DEBUG */ 
326
327         if (ctlr > MAX_CTLR || hba[ctlr] == NULL)
328                 return -ENXIO;
329
330         if (!suser() && hba[ctlr]->sizes[ MINOR(inode->i_rdev)] == 0)
331                 return -ENXIO;
332
333         /*
334          * Root is allowed to open raw volume zero even if its not configured
335          * so array config can still work.  I don't think I really like this,
336          * but I'm already using way to many device nodes to claim another one
337          * for "raw controller".
338          */
339         if (suser()
340                 && (hba[ctlr]->sizes[MINOR(inode->i_rdev)] == 0) 
341                 && (MINOR(inode->i_rdev)!= 0))
342                 return -ENXIO;
343
344         hba[ctlr]->drv[dsk].usage_count++;
345         hba[ctlr]->usage_count++;
346         return 0;
347 }
348 /*
349  * Close.  Sync first.
350  */
351 static int cciss_release(struct inode *inode, struct file *filep)
352 {
353         int ctlr = MAJOR(inode->i_rdev) - MAJOR_NR;
354         int dsk  = MINOR(inode->i_rdev) >> NWD_SHIFT;
355
356 #ifdef CCISS_DEBUG
357         printk(KERN_DEBUG "cciss_release %x (%x:%x)\n", inode->i_rdev, ctlr, dsk);
358 #endif /* CCISS_DEBUG */
359
360         /* fsync_dev(inode->i_rdev); */
361
362         hba[ctlr]->drv[dsk].usage_count--;
363         hba[ctlr]->usage_count--;
364         return 0;
365 }
366
367 /*
368  * ioctl 
369  */
370 static int cciss_ioctl(struct inode *inode, struct file *filep, 
371                 unsigned int cmd, unsigned long arg)
372 {
373         int ctlr = MAJOR(inode->i_rdev) - MAJOR_NR;
374         int dsk  = MINOR(inode->i_rdev) >> NWD_SHIFT;
375
376 #ifdef CCISS_DEBUG
377         printk(KERN_DEBUG "cciss_ioctl: Called with cmd=%x %lx\n", cmd, arg);
378 #endif /* CCISS_DEBUG */ 
379         
380         switch(cmd) {
381         case HDIO_GETGEO:
382         {
383                 struct hd_geometry *geo = (struct hd_geometry *)arg;
384                 int diskinfo[4];
385
386                 if (hba[ctlr]->drv[dsk].cylinders) {
387                         diskinfo[0] = hba[ctlr]->drv[dsk].heads;
388                         diskinfo[1] = hba[ctlr]->drv[dsk].sectors;
389                         diskinfo[2] = hba[ctlr]->drv[dsk].cylinders;
390                 } else {
391                         diskinfo[0] = 0xff;
392                         diskinfo[1] = 0x3f;
393                         diskinfo[2] = hba[ctlr]->drv[dsk].nr_blocks / (0xff*0x3f);
394                 }
395                 put_user(diskinfo[0], &geo->heads);
396                 put_user(diskinfo[1], &geo->sectors);
397                 put_user(diskinfo[2], &geo->cylinders);
398                 put_user(get_start_sect(inode->i_rdev), &geo->start);
399                 return 0;
400         }
401         case BLKRRPART:
402                 return revalidate_logvol(inode->i_rdev, 1);
403         case BLKGETSIZE:
404         case BLKGETSIZE64:
405         case BLKFLSBUF:
406         case BLKBSZSET:
407         case BLKBSZGET:
408         case BLKROSET:
409         case BLKROGET:
410         case BLKRASET:
411         case BLKRAGET:
412         case BLKPG:
413                 return blk_ioctl(inode->i_rdev, cmd, arg);
414         case CCISS_GETPCIINFO:
415         {
416                 cciss_pci_info_struct pciinfo;
417
418                 if (!arg) return -EINVAL;
419                 pciinfo.bus = hba[ctlr]->pdev->bus->number;
420                 pciinfo.dev_fn = hba[ctlr]->pdev->devfn;
421                 pciinfo.board_id = hba[ctlr]->board_id;
422                 if (copy_to_user((void *) arg, &pciinfo,  sizeof( cciss_pci_info_struct )))
423                         return  -EFAULT;
424                 return(0);
425         }       
426         case CCISS_GETINTINFO:
427         {
428                 cciss_coalint_struct intinfo;
429                 ctlr_info_t *c = hba[ctlr];
430
431                 if (!arg) return -EINVAL;
432                 intinfo.delay = readl(&c->cfgtable->HostWrite.CoalIntDelay);
433                 intinfo.count = readl(&c->cfgtable->HostWrite.CoalIntCount);
434                 if (copy_to_user((void *) arg, &intinfo, sizeof( cciss_coalint_struct )))
435                         return -EFAULT;
436                 return(0);
437         }
438         case CCISS_SETINTINFO:
439         {
440                 cciss_coalint_struct intinfo;
441                 ctlr_info_t *c = hba[ctlr];
442                 unsigned long flags;
443                 int i;
444
445                 if (!arg) return -EINVAL;       
446                 if (!capable(CAP_SYS_ADMIN)) return -EPERM;
447                 if (copy_from_user(&intinfo, (void *) arg, sizeof( cciss_coalint_struct)))
448                         return -EFAULT;
449                 if ( (intinfo.delay == 0 ) && (intinfo.count == 0))
450
451                 {
452 //                      printk("cciss_ioctl: delay and count cannot be 0\n");
453                         return( -EINVAL);
454                 }
455                 spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
456                 /* Update the field, and then ring the doorbell */ 
457                 writel( intinfo.delay, 
458                         &(c->cfgtable->HostWrite.CoalIntDelay));
459                 writel( intinfo.count, 
460                         &(c->cfgtable->HostWrite.CoalIntCount));
461                 writel( CFGTBL_ChangeReq, c->vaddr + SA5_DOORBELL);
462
463                 for(i=0;i<MAX_CONFIG_WAIT;i++)
464                 {
465                         if (!(readl(c->vaddr + SA5_DOORBELL) 
466                                         & CFGTBL_ChangeReq))
467                                 break;
468                         /* delay and try again */
469                         udelay(1000);
470                 }       
471                 spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
472                 if (i >= MAX_CONFIG_WAIT)
473                         return( -EFAULT);
474                 return(0);
475         }
476         case CCISS_GETNODENAME:
477         {
478                 NodeName_type NodeName;
479                 ctlr_info_t *c = hba[ctlr];
480                 int i; 
481
482                 if (!arg) return -EINVAL;
483                 for(i=0;i<16;i++)
484                         NodeName[i] = readb(&c->cfgtable->ServerName[i]);
485                 if (copy_to_user((void *) arg, NodeName, sizeof( NodeName_type)))
486                         return  -EFAULT;
487                 return(0);
488         }
489         case CCISS_SETNODENAME:
490         {
491                 NodeName_type NodeName;
492                 ctlr_info_t *c = hba[ctlr];
493                 unsigned long flags;
494                 int i;
495
496                 if (!arg) return -EINVAL;
497                 if (!capable(CAP_SYS_ADMIN)) return -EPERM;
498                 
499                 if (copy_from_user(NodeName, (void *) arg, sizeof( NodeName_type)))
500                         return -EFAULT;
501
502                 spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
503
504                         /* Update the field, and then ring the doorbell */ 
505                 for(i=0;i<16;i++)
506                         writeb( NodeName[i], &c->cfgtable->ServerName[i]);
507                         
508                 writel( CFGTBL_ChangeReq, c->vaddr + SA5_DOORBELL);
509
510                 for(i=0;i<MAX_CONFIG_WAIT;i++)
511                 {
512                         if (!(readl(c->vaddr + SA5_DOORBELL) 
513                                         & CFGTBL_ChangeReq))
514                                 break;
515                         /* delay and try again */
516                         udelay(1000);
517                 }       
518                 spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
519                 if (i >= MAX_CONFIG_WAIT)
520                         return( -EFAULT);
521                 return(0);
522         }
523
524         case CCISS_GETHEARTBEAT:
525         {
526                 Heartbeat_type heartbeat;
527                 ctlr_info_t *c = hba[ctlr];
528
529                 if (!arg) return -EINVAL;
530                 heartbeat = readl(&c->cfgtable->HeartBeat);
531                 if (copy_to_user((void *) arg, &heartbeat, sizeof( Heartbeat_type)))
532                         return -EFAULT;
533                 return(0);
534         }
535         case CCISS_GETBUSTYPES:
536         {
537                 BusTypes_type BusTypes;
538                 ctlr_info_t *c = hba[ctlr];
539
540                 if (!arg) return -EINVAL;
541                 BusTypes = readl(&c->cfgtable->BusTypes);
542                 if (copy_to_user((void *) arg, &BusTypes, sizeof( BusTypes_type) ))
543                         return  -EFAULT;
544                 return(0);
545         }
546         case CCISS_GETFIRMVER:
547         {
548                 FirmwareVer_type firmware;
549
550                 if (!arg) return -EINVAL;
551                 memcpy(firmware, hba[ctlr]->firm_ver, 4);
552
553                 if (copy_to_user((void *) arg, firmware, sizeof( FirmwareVer_type)))
554                         return -EFAULT;
555                 return(0);
556         }
557         case CCISS_GETDRIVVER:
558         {
559                 DriverVer_type DriverVer = DRIVER_VERSION;
560
561                 if (!arg) return -EINVAL;
562
563                 if (copy_to_user((void *) arg, &DriverVer, sizeof( DriverVer_type) ))
564                         return -EFAULT;
565                 return(0);
566         }
567
568         case CCISS_REVALIDVOLS:
569                 return( revalidate_allvol(inode->i_rdev));
570         
571         case CCISS_PASSTHRU:
572         {
573                 IOCTL_Command_struct iocommand;
574                 ctlr_info_t *h = hba[ctlr];
575                 CommandList_struct *c;
576                 char    *buff = NULL;
577                 u64bit  temp64;
578                 unsigned long flags;
579
580                 if (!arg) return -EINVAL;
581         
582                 if (!capable(CAP_SYS_RAWIO)) return -EPERM;
583
584                 if (copy_from_user(&iocommand, (void *) arg, sizeof( IOCTL_Command_struct) ))
585                         return -EFAULT;
586                 if((iocommand.buf_size < 1) && 
587                                 (iocommand.Request.Type.Direction != XFER_NONE))
588                 {       
589                         return -EINVAL;
590                 } 
591                 /* Check kmalloc limits */
592                 if(iocommand.buf_size > 128000)
593                         return -EINVAL;
594                 if(iocommand.buf_size > 0)
595                 {
596                         buff =  kmalloc(iocommand.buf_size, GFP_KERNEL);
597                         if( buff == NULL) 
598                                 return -EFAULT;
599                 }
600                 if (iocommand.Request.Type.Direction == XFER_WRITE)
601                 {
602                         /* Copy the data into the buffer we created */ 
603                         if (copy_from_user(buff, iocommand.buf, iocommand.buf_size))
604                         {
605                                 kfree(buff);
606                                 return -EFAULT;
607                         }
608                 }
609                 if ((c = cmd_alloc(h , 0)) == NULL)
610                 {
611                         kfree(buff);
612                         return -ENOMEM;
613                 }
614                         // Fill in the command type 
615                 c->cmd_type = CMD_IOCTL_PEND;
616                         // Fill in Command Header 
617                 c->Header.ReplyQueue = 0;  // unused in simple mode
618                 if( iocommand.buf_size > 0)     // buffer to fill 
619                 {
620                         c->Header.SGList = 1;
621                         c->Header.SGTotal= 1;
622                 } else  // no buffers to fill  
623                 {
624                         c->Header.SGList = 0;
625                         c->Header.SGTotal= 0;
626                 }
627                 c->Header.LUN = iocommand.LUN_info;
628                 c->Header.Tag.lower = c->busaddr;  // use the kernel address the cmd block for tag
629                 
630                 // Fill in Request block 
631                 c->Request = iocommand.Request; 
632         
633                 // Fill in the scatter gather information
634                 if (iocommand.buf_size > 0 ) 
635                 {
636                         temp64.val = pci_map_single( h->pdev, buff,
637                                         iocommand.buf_size, 
638                                 PCI_DMA_BIDIRECTIONAL); 
639                         c->SG[0].Addr.lower = temp64.val32.lower;
640                         c->SG[0].Addr.upper = temp64.val32.upper;
641                         c->SG[0].Len = iocommand.buf_size;
642                         c->SG[0].Ext = 0;  // we are not chaining
643                 }
644                 /* Put the request on the tail of the request queue */
645                 spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
646                 addQ(&h->reqQ, c);
647                 h->Qdepth++;
648                 start_io(h);
649                 spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
650
651                 /* Wait for completion */
652                 while(c->cmd_type != CMD_IOCTL_DONE)
653                         schedule_timeout(1);
654
655                 /* unlock the buffers from DMA */
656                 temp64.val32.lower = c->SG[0].Addr.lower;
657                 temp64.val32.upper = c->SG[0].Addr.upper;
658                 pci_unmap_single( h->pdev, (dma_addr_t) temp64.val,
659                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
660
661                 /* Copy the error information out */ 
662                 iocommand.error_info = *(c->err_info);
663                 if ( copy_to_user((void *) arg, &iocommand, sizeof( IOCTL_Command_struct) ) )
664                 {
665                         kfree(buff);
666                         cmd_free(h, c, 0);
667                         return( -EFAULT);       
668                 }       
669
670                 if (iocommand.Request.Type.Direction == XFER_READ)
671                 {
672                         /* Copy the data out of the buffer we created */
673                         if (copy_to_user(iocommand.buf, buff, iocommand.buf_size))
674                         {
675                                 kfree(buff);
676                                 cmd_free(h, c, 0);
677                                 return -EFAULT;
678                         }
679                 }
680                 kfree(buff);
681                 cmd_free(h, c, 0);
682                 return(0);
683         } 
684
685         default:
686                 return -EBADRQC;
687         }
688         
689 }
690
691 /* Borrowed and adapted from sd.c */
692 static int revalidate_logvol(kdev_t dev, int maxusage)
693 {
694         int ctlr, target;
695         struct gendisk *gdev;
696         unsigned long flags;
697         int res;
698
699         target = MINOR(dev) >> NWD_SHIFT;
700         ctlr = MAJOR(dev) - MAJOR_NR;
701         gdev = &(hba[ctlr]->gendisk);
702
703         spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
704         if (hba[ctlr]->drv[target].usage_count > maxusage) {
705                 spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
706                 printk(KERN_WARNING "cciss: Device busy for "
707                         "revalidation (usage=%d)\n",
708                         hba[ctlr]->drv[target].usage_count);
709                 return -EBUSY;
710         }
711         hba[ctlr]->drv[target].usage_count++;
712         spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
713
714         res = wipe_partitions(dev);
715         if (res)
716                 goto leave;
717
718         /* setup partitions per disk */
719         grok_partitions(dev, hba[ctlr]->drv[target].nr_blocks);
720 leave:
721         hba[ctlr]->drv[target].usage_count--;
722         return res;
723 }
724
725 static int frevalidate_logvol(kdev_t dev)
726 {
727 #ifdef CCISS_DEBUG
728         printk(KERN_DEBUG "cciss: frevalidate has been called\n");
729 #endif /* CCISS_DEBUG */ 
730         return revalidate_logvol(dev, 0);
731 }
732
733 /*
734  * revalidate_allvol is for online array config utilities.  After a
735  * utility reconfigures the drives in the array, it can use this function
736  * (through an ioctl) to make the driver zap any previous disk structs for
737  * that controller and get new ones.
738  *
739  * Right now I'm using the getgeometry() function to do this, but this
740  * function should probably be finer grained and allow you to revalidate one
741  * particualar logical volume (instead of all of them on a particular
742  * controller).
743  */
744 static int revalidate_allvol(kdev_t dev)
745 {
746         int ctlr, i;
747         unsigned long flags;
748
749         ctlr = MAJOR(dev) - MAJOR_NR;
750         if (MINOR(dev) != 0)
751                 return -ENXIO;
752
753         spin_lock_irqsave(CCISS_LOCK(ctlr), flags);
754         if (hba[ctlr]->usage_count > 1) {
755                 spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
756                 printk(KERN_WARNING "cciss: Device busy for volume"
757                         " revalidation (usage=%d)\n", hba[ctlr]->usage_count);
758                 return -EBUSY;
759         }
760         hba[ctlr]->usage_count++;
761         spin_unlock_irqrestore(CCISS_LOCK(ctlr), flags);
762
763         /*
764          * Set the partition and block size structures for all volumes
765          * on this controller to zero.  We will reread all of this data
766          */
767         memset(hba[ctlr]->hd,         0, sizeof(struct hd_struct) * 256);
768         memset(hba[ctlr]->sizes,      0, sizeof(int) * 256);
769         memset(hba[ctlr]->blocksizes, 0, sizeof(int) * 256);
770         memset(hba[ctlr]->drv,        0, sizeof(drive_info_struct)
771                                                 * CISS_MAX_LUN);
772         hba[ctlr]->gendisk.nr_real = 0;
773
774         /*
775          * Tell the array controller not to give us any interrupts while
776          * we check the new geometry.  Then turn interrupts back on when
777          * we're done.
778          */
779         hba[ctlr]->access.set_intr_mask(hba[ctlr], CCISS_INTR_OFF);
780         cciss_getgeometry(ctlr);
781         hba[ctlr]->access.set_intr_mask(hba[ctlr], CCISS_INTR_ON);
782
783         cciss_geninit(ctlr);
784         for(i=0; i<NWD; i++)
785                 if (hba[ctlr]->sizes[ i<<NWD_SHIFT ])
786                         revalidate_logvol(dev+(i<<NWD_SHIFT), 2);
787
788         hba[ctlr]->usage_count--;
789         return 0;
790 }
791
792
793
794 /*
795  *   Wait polling for a command to complete.
796  *   The memory mapped FIFO is polled for the completion.
797  *   Used only at init time, interrupts disabled.
798  */
799 static unsigned long pollcomplete(int ctlr)
800 {
801         unsigned long done;
802         int i;
803
804         /* Wait (up to 2 seconds) for a command to complete */
805
806         for (i = 200000; i > 0; i--) {
807                 done = hba[ctlr]->access.command_completed(hba[ctlr]);
808                 if (done == FIFO_EMPTY) {
809                         udelay(10);     /* a short fixed delay */
810                 } else
811                         return (done);
812         }
813         /* Invalid address to tell caller we ran out of time */
814         return 1;
815 }
816 /*
817  * Send a command to the controller, and wait for it to complete.  
818  * Only used at init time. 
819  */
820 static int sendcmd(
821         __u8    cmd,
822         int     ctlr,
823         void    *buff,
824         size_t  size,
825         unsigned int use_unit_num,
826         unsigned int log_unit,
827         __u8    page_code )
828 {
829         CommandList_struct *c;
830         int i;
831         unsigned long complete;
832         ctlr_info_t *info_p= hba[ctlr];
833         u64bit buff_dma_handle;
834
835         c = cmd_alloc(info_p, 1);
836         if (c == NULL)
837         {
838                 printk(KERN_WARNING "cciss: unable to get memory");
839                 return(IO_ERROR);
840         }
841         // Fill in Command Header 
842         c->Header.ReplyQueue = 0;  // unused in simple mode
843         if( buff != NULL)       // buffer to fill 
844         {
845                 c->Header.SGList = 1;
846                 c->Header.SGTotal= 1;
847         } else  // no buffers to fill  
848         {
849                 c->Header.SGList = 0;
850                 c->Header.SGTotal= 0;
851         }
852         c->Header.Tag.lower = c->busaddr;  // use the kernel address the cmd block for tag
853         // Fill in Request block        
854         switch(cmd)
855         {
856                 case  CISS_INQUIRY:
857                         /* If the logical unit number is 0 then, this is going
858                                 to controller so It's a physical command
859                                 mode = 0 target = 0.
860                                 So we have nothing to write. 
861                                 Otherwise 
862                                 mode = 1  target = LUNID
863                         */
864                         if(use_unit_num != 0)
865                         {
866                                 c->Header.LUN.LogDev.VolId=
867                                         hba[ctlr]->drv[log_unit].LunID;
868                                 c->Header.LUN.LogDev.Mode = 1;
869                         }
870                         /* are we trying to read a vital product page */
871                         if(page_code != 0)
872                         {
873                                 c->Request.CDB[1] = 0x01;
874                                 c->Request.CDB[2] = page_code;
875                         }
876                         c->Request.CDBLen = 6;
877                         c->Request.Type.Type =  TYPE_CMD; // It is a command. 
878                         c->Request.Type.Attribute = ATTR_SIMPLE;  
879                         c->Request.Type.Direction = XFER_READ; // Read 
880                         c->Request.Timeout = 0; // Don't time out 
881                         c->Request.CDB[0] =  CISS_INQUIRY;
882                         c->Request.CDB[4] = size  & 0xFF;  
883                 break;
884                 case CISS_REPORT_LOG:
885                         /* Talking to controller so It's a physical command
886                                 mode = 00 target = 0.
887                                 So we have nothing to write.
888                         */
889                         c->Request.CDBLen = 12;
890                         c->Request.Type.Type =  TYPE_CMD; // It is a command.
891                         c->Request.Type.Attribute = ATTR_SIMPLE; 
892                         c->Request.Type.Direction = XFER_READ; // Read
893                         c->Request.Timeout = 0; // Don't time out
894                         c->Request.CDB[0] = CISS_REPORT_LOG;
895                         c->Request.CDB[6] = (size >> 24) & 0xFF;  //MSB
896                         c->Request.CDB[7] = (size >> 16) & 0xFF;
897                         c->Request.CDB[8] = (size >> 8) & 0xFF;
898                         c->Request.CDB[9] = size & 0xFF;
899                 break;
900
901                 case CCISS_READ_CAPACITY:
902                         c->Header.LUN.LogDev.VolId= 
903                                 hba[ctlr]->drv[log_unit].LunID;
904                         c->Header.LUN.LogDev.Mode = 1;
905                         c->Request.CDBLen = 10;
906                         c->Request.Type.Type =  TYPE_CMD; // It is a command.
907                         c->Request.Type.Attribute = ATTR_SIMPLE; 
908                         c->Request.Type.Direction = XFER_READ; // Read
909                         c->Request.Timeout = 0; // Don't time out
910                         c->Request.CDB[0] = CCISS_READ_CAPACITY;
911                 break;
912                 default:
913                         printk(KERN_WARNING
914                                 "cciss:  Unknown Command 0x%c sent attempted\n",
915                                   cmd);
916                         cmd_free(info_p, c, 1);
917                         return(IO_ERROR);
918         };
919         // Fill in the scatter gather information
920         if (size > 0 ) 
921         {
922                 buff_dma_handle.val = (__u64) pci_map_single( info_p->pdev, 
923                         buff, size, PCI_DMA_BIDIRECTIONAL);
924                 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
925                 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
926                 c->SG[0].Len = size;
927                 c->SG[0].Ext = 0;  // we are not chaining
928         }
929         /*
930          * Disable interrupt
931          */
932 #ifdef CCISS_DEBUG
933         printk(KERN_DEBUG "cciss: turning intr off\n");
934 #endif /* CCISS_DEBUG */ 
935         info_p->access.set_intr_mask(info_p, CCISS_INTR_OFF);
936         
937         /* Make sure there is room in the command FIFO */
938         /* Actually it should be completely empty at this time. */
939         for (i = 200000; i > 0; i--) 
940         {
941                 /* if fifo isn't full go */
942                 if (!(info_p->access.fifo_full(info_p))) 
943                 {
944                         
945                         break;
946                 }
947                 udelay(10);
948                 printk(KERN_WARNING "cciss cciss%d: SendCmd FIFO full,"
949                         " waiting!\n", ctlr);
950         }
951         /*
952          * Send the cmd
953          */
954         info_p->access.submit_command(info_p, c);
955         complete = pollcomplete(ctlr);
956
957 #ifdef CCISS_DEBUG
958         printk(KERN_DEBUG "cciss: command completed\n");
959 #endif /* CCISS_DEBUG */
960
961         /* unlock the data buffer from DMA */
962         pci_unmap_single(info_p->pdev, (dma_addr_t) buff_dma_handle.val,
963                                 size, PCI_DMA_BIDIRECTIONAL);
964         if (complete != 1) {
965                 if ( (complete & CISS_ERROR_BIT)
966                      && (complete & ~CISS_ERROR_BIT) == c->busaddr)
967                      {
968                         /* if data overrun or underun on Report command 
969                                 ignore it 
970                         */
971                         if (((c->Request.CDB[0] == CISS_REPORT_LOG) ||
972                              (c->Request.CDB[0] == CISS_INQUIRY)) &&
973                                 ((c->err_info->CommandStatus == 
974                                         CMD_DATA_OVERRUN) || 
975                                  (c->err_info->CommandStatus == 
976                                         CMD_DATA_UNDERRUN)
977                                 ))
978                         {
979                                 complete = c->busaddr;
980                         } else
981                         {
982                                 printk(KERN_WARNING "ciss ciss%d: sendcmd"
983                                 " Error %x \n", ctlr, 
984                                         c->err_info->CommandStatus); 
985                                 printk(KERN_WARNING "ciss ciss%d: sendcmd"
986                                 " offensive info\n"
987                                 "  size %x\n   num %x   value %x\n", ctlr,
988                                   c->err_info->MoreErrInfo.Invalid_Cmd.offense_size,
989                                   c->err_info->MoreErrInfo.Invalid_Cmd.offense_num,
990                                   c->err_info->MoreErrInfo.Invalid_Cmd.offense_value);
991                                 cmd_free(info_p,c, 1);
992                                 return(IO_ERROR);
993                         }
994                 }
995                 if (complete != c->busaddr) {
996                         printk( KERN_WARNING "cciss cciss%d: SendCmd "
997                       "Invalid command list address returned! (%lx)\n",
998                                 ctlr, complete);
999                         cmd_free(info_p, c, 1);
1000                         return (IO_ERROR);
1001                 }
1002         } else {
1003                 printk( KERN_WARNING
1004                         "cciss cciss%d: SendCmd Timeout out, "
1005                         "No command list address returned!\n",
1006                         ctlr);
1007                 cmd_free(info_p, c, 1);
1008                 return (IO_ERROR);
1009         }
1010         cmd_free(info_p, c, 1);
1011         return (IO_OK);
1012
1013 /*
1014  * Map (physical) PCI mem into (virtual) kernel space
1015  */
1016 static ulong remap_pci_mem(ulong base, ulong size)
1017 {
1018         ulong page_base        = ((ulong) base) & PAGE_MASK;
1019         ulong page_offs        = ((ulong) base) - page_base;
1020         ulong page_remapped    = (ulong) ioremap(page_base, page_offs+size);
1021
1022         return (ulong) (page_remapped ? (page_remapped + page_offs) : 0UL);
1023 }
1024
1025 /*
1026  * Enqueuing and dequeuing functions for cmdlists.
1027  */
1028 static inline void addQ(CommandList_struct **Qptr, CommandList_struct *c)
1029 {
1030         if (*Qptr == NULL) {
1031                 *Qptr = c;
1032                 c->next = c->prev = c;
1033         } else {
1034                 c->prev = (*Qptr)->prev;
1035                 c->next = (*Qptr);
1036                 (*Qptr)->prev->next = c;
1037                 (*Qptr)->prev = c;
1038         }
1039 }
1040
1041 static inline CommandList_struct *removeQ(CommandList_struct **Qptr, 
1042                                                 CommandList_struct *c)
1043 {
1044         if (c && c->next != c) {
1045                 if (*Qptr == c) *Qptr = c->next;
1046                 c->prev->next = c->next;
1047                 c->next->prev = c->prev;
1048         } else {
1049                 *Qptr = NULL;
1050         }
1051         return c;
1052 }
1053
1054 /* 
1055  * Takes jobs of the Q and sends them to the hardware, then puts it on 
1056  * the Q to wait for completion. 
1057  */ 
1058 static void start_io( ctlr_info_t *h)
1059 {
1060         CommandList_struct *c;
1061         
1062         while(( c = h->reqQ) != NULL )
1063         {
1064                 /* can't do anything if fifo is full */
1065                 if ((h->access.fifo_full(h))) {
1066                         printk(KERN_WARNING "cciss: fifo full\n");
1067                         break;
1068                 }
1069
1070                 /* Get the frist entry from the Request Q */ 
1071                 removeQ(&(h->reqQ), c);
1072                 h->Qdepth--;
1073         
1074                 /* Tell the controller execute command */ 
1075                 h->access.submit_command(h, c);
1076                 
1077                 /* Put job onto the completed Q */ 
1078                 addQ (&(h->cmpQ), c); 
1079         }
1080 }
1081
1082 static inline void complete_buffers(struct bio *bio, int status)
1083 {
1084         while (bio) {
1085                 int nsecs = bio_sectors(bio);
1086
1087                 struct bio *xbh = bio->bi_next; 
1088                 bio->bi_next = NULL; 
1089                 blk_finished_io(nsecs);
1090                 bio_endio(bio, status, nsecs);
1091                 bio = xbh;
1092         }
1093
1094
1095 /* checks the status of the job and calls complete buffers to mark all 
1096  * buffers for the completed job. 
1097  */ 
1098 static inline void complete_command( CommandList_struct *cmd, int timeout)
1099 {
1100         int status = 1;
1101         int i;
1102         u64bit temp64;
1103                 
1104         if (timeout)
1105                 status = 0; 
1106         /* unmap the DMA mapping for all the scatter gather elements */
1107         for(i=0; i<cmd->Header.SGList; i++)
1108         {
1109                 temp64.val32.lower = cmd->SG[i].Addr.lower;
1110                 temp64.val32.upper = cmd->SG[i].Addr.upper;
1111                 pci_unmap_page(hba[cmd->ctlr]->pdev,
1112                         temp64.val, cmd->SG[i].Len, 
1113                         (cmd->Request.Type.Direction == XFER_READ) ? 
1114                                 PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
1115         }
1116
1117         if(cmd->err_info->CommandStatus != 0) 
1118         { /* an error has occurred */ 
1119                 switch(cmd->err_info->CommandStatus)
1120                 {
1121                         case CMD_TARGET_STATUS:
1122                                 printk(KERN_WARNING "cciss: cmd %p has "
1123                                         " completed with errors\n", cmd);
1124                                 if( cmd->err_info->ScsiStatus)
1125                                 {
1126                                         printk(KERN_WARNING "cciss: cmd %p "
1127                                         "has SCSI Status = %x\n",
1128                                                 cmd,  
1129                                                 cmd->err_info->ScsiStatus);
1130                                 }
1131
1132                         break;
1133                         case CMD_DATA_UNDERRUN:
1134                                 printk(KERN_WARNING "cciss: cmd %p has"
1135                                         " completed with data underrun "
1136                                         "reported\n", cmd);
1137                         break;
1138                         case CMD_DATA_OVERRUN:
1139                                 printk(KERN_WARNING "cciss: cmd %p has"
1140                                         " completed with data overrun "
1141                                         "reported\n", cmd);
1142                         break;
1143                         case CMD_INVALID:
1144                                 printk(KERN_WARNING "cciss: cmd %p is "
1145                                         "reported invalid\n", cmd);
1146                                 status = 0;
1147                         break;
1148                         case CMD_PROTOCOL_ERR:
1149                                 printk(KERN_WARNING "cciss: cmd %p has "
1150                                         "protocol error \n", cmd);
1151                                 status = 0;
1152                         break;
1153                         case CMD_HARDWARE_ERR:
1154                                 printk(KERN_WARNING "cciss: cmd %p had " 
1155                                         " hardware error\n", cmd);
1156                                 status = 0;
1157                         break;
1158                         case CMD_CONNECTION_LOST:
1159                                 printk(KERN_WARNING "cciss: cmd %p had "
1160                                         "connection lost\n", cmd);
1161                                 status=0;
1162                         break;
1163                         case CMD_ABORTED:
1164                                 printk(KERN_WARNING "cciss: cmd %p was "
1165                                         "aborted\n", cmd);
1166                                 status=0;
1167                         break;
1168                         case CMD_ABORT_FAILED:
1169                                 printk(KERN_WARNING "cciss: cmd %p reports "
1170                                         "abort failed\n", cmd);
1171                                 status=0;
1172                         break;
1173                         case CMD_UNSOLICITED_ABORT:
1174                                 printk(KERN_WARNING "cciss: cmd %p aborted "
1175                                         "do to an unsolicited abort\n", cmd);
1176                                 status=0;
1177                         break;
1178                         case CMD_TIMEOUT:
1179                                 printk(KERN_WARNING "cciss: cmd %p timedout\n",
1180                                         cmd);
1181                                 status=0;
1182                         break;
1183                         default:
1184                                 printk(KERN_WARNING "cciss: cmd %p returned "
1185                                         "unknown status %x\n", cmd, 
1186                                                 cmd->err_info->CommandStatus); 
1187                                 status=0;
1188                 }
1189         }
1190
1191         complete_buffers(cmd->rq->bio, status);
1192
1193 #ifdef CCISS_DEBUG
1194         printk("Done with %p\n", cmd->rq);
1195 #endif /* CCISS_DEBUG */ 
1196
1197         end_that_request_last(cmd->rq);
1198 }
1199
1200 /* 
1201  * Get a request and submit it to the controller. 
1202  */
1203 static void do_cciss_request(request_queue_t *q)
1204 {
1205         ctlr_info_t *h= q->queuedata; 
1206         CommandList_struct *c;
1207         int log_unit, start_blk, seg;
1208         struct list_head *queue_head = &q->queue_head;
1209         struct request *creq;
1210         u64bit temp64;
1211         struct scatterlist tmp_sg[MAXSGENTRIES];
1212         int i, dir;
1213
1214         if (blk_queue_plugged(q))
1215                 goto startio;
1216
1217 queue:
1218         if (list_empty(queue_head))
1219                 goto startio;
1220
1221         creq = elv_next_request(q);
1222         if (creq->nr_segments > MAXSGENTRIES)
1223                 BUG();
1224
1225         if (h->ctlr != MAJOR(creq->rq_dev)-MAJOR_NR )
1226         {
1227                 printk(KERN_WARNING "doreq cmd for %d, %x at %p\n",
1228                                 h->ctlr, creq->rq_dev, creq);
1229                 blkdev_dequeue_request(creq);
1230                 complete_buffers(creq->bio, 0);
1231                 end_that_request_last(creq);
1232                 goto startio;
1233         }
1234
1235         if (( c = cmd_alloc(h, 1)) == NULL)
1236                 goto startio;
1237
1238         blkdev_dequeue_request(creq);
1239
1240         spin_unlock_irq(&q->queue_lock);
1241
1242         c->cmd_type = CMD_RWREQ;
1243         c->rq = creq;
1244         
1245         /* fill in the request */ 
1246         log_unit = MINOR(creq->rq_dev) >> NWD_SHIFT; 
1247         c->Header.ReplyQueue = 0;  // unused in simple mode
1248         c->Header.Tag.lower = c->busaddr;  // use the physical address the cmd block for tag
1249         c->Header.LUN.LogDev.VolId= hba[h->ctlr]->drv[log_unit].LunID;
1250         c->Header.LUN.LogDev.Mode = 1;
1251         c->Request.CDBLen = 10; // 12 byte commands not in FW yet;
1252         c->Request.Type.Type =  TYPE_CMD; // It is a command. 
1253         c->Request.Type.Attribute = ATTR_SIMPLE; 
1254         c->Request.Type.Direction = 
1255                 (rq_data_dir(creq) == READ) ? XFER_READ: XFER_WRITE; 
1256         c->Request.Timeout = 0; // Don't time out       
1257         c->Request.CDB[0] = (rq_data_dir(creq) == READ) ? CCISS_READ : CCISS_WRITE;
1258         start_blk = creq->sector;
1259 #ifdef CCISS_DEBUG
1260         printk(KERN_DEBUG "ciss: sector =%d nr_sectors=%d\n",(int) creq->sector,
1261                 (int) creq->nr_sectors);        
1262 #endif /* CCISS_DEBUG */
1263
1264         seg = blk_rq_map_sg(q, creq, tmp_sg);
1265
1266         /* get the DMA records for the setup */ 
1267         if (c->Request.Type.Direction == XFER_READ)
1268                 dir = PCI_DMA_FROMDEVICE;
1269         else
1270                 dir = PCI_DMA_TODEVICE;
1271
1272         for (i=0; i<seg; i++)
1273         {
1274                 c->SG[i].Len = tmp_sg[i].length;
1275                 temp64.val = (__u64) pci_map_page(h->pdev, tmp_sg[i].page,
1276                                           tmp_sg[i].offset, tmp_sg[i].length,
1277                                           dir);
1278                 c->SG[i].Addr.lower = temp64.val32.lower;
1279                 c->SG[i].Addr.upper = temp64.val32.upper;
1280                 c->SG[i].Ext = 0;  // we are not chaining
1281         }
1282         /* track how many SG entries we are using */ 
1283         if( seg > h->maxSG)
1284                 h->maxSG = seg; 
1285
1286 #ifdef CCISS_DEBUG
1287         printk(KERN_DEBUG "cciss: Submitting %d sectors in %d segments\n", creq->nr_sectors, seg);
1288 #endif /* CCISS_DEBUG */
1289
1290         c->Header.SGList = c->Header.SGTotal = seg;
1291         c->Request.CDB[1]= 0;
1292         c->Request.CDB[2]= (start_blk >> 24) & 0xff;    //MSB
1293         c->Request.CDB[3]= (start_blk >> 16) & 0xff;
1294         c->Request.CDB[4]= (start_blk >>  8) & 0xff;
1295         c->Request.CDB[5]= start_blk & 0xff;
1296         c->Request.CDB[6]= 0; // (sect >> 24) & 0xff; MSB
1297         c->Request.CDB[7]= (creq->nr_sectors >>  8) & 0xff; 
1298         c->Request.CDB[8]= creq->nr_sectors & 0xff; 
1299         c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
1300
1301         spin_lock_irq(&q->queue_lock);
1302
1303         addQ(&(h->reqQ),c);
1304         h->Qdepth++;
1305         if(h->Qdepth > h->maxQsinceinit)
1306                 h->maxQsinceinit = h->Qdepth; 
1307
1308         goto queue;
1309 startio:
1310         start_io(h);
1311 }
1312
1313 static void do_cciss_intr(int irq, void *dev_id, struct pt_regs *regs)
1314 {
1315         ctlr_info_t *h = dev_id;
1316         CommandList_struct *c;
1317         unsigned long flags;
1318         __u32 a, a1;
1319
1320
1321         /* Is this interrupt for us? */
1322         if ( h->access.intr_pending(h) == 0)
1323                 return;
1324
1325         /*
1326          * If there are completed commands in the completion queue,
1327          * we had better do something about it.
1328          */
1329         spin_lock_irqsave(CCISS_LOCK(h->ctlr), flags);
1330         while( h->access.intr_pending(h))
1331         {
1332                 while((a = h->access.command_completed(h)) != FIFO_EMPTY) 
1333                 {
1334                         a1 = a;
1335                         a &= ~3;
1336                         if ((c = h->cmpQ) == NULL)
1337                         {  
1338                                 printk(KERN_WARNING "cciss: Completion of %08lx ignored\n", (unsigned long)a1);
1339                                 continue;       
1340                         } 
1341                         while(c->busaddr != a) {
1342                                 c = c->next;
1343                                 if (c == h->cmpQ) 
1344                                         break;
1345                         }
1346                         /*
1347                          * If we've found the command, take it off the
1348                          * completion Q and free it
1349                          */
1350                          if (c->busaddr == a) {
1351                                 removeQ(&h->cmpQ, c);
1352                                 if (c->cmd_type == CMD_RWREQ) {
1353                                         complete_command(c, 0);
1354                                         cmd_free(h, c, 1);
1355                                 } else if (c->cmd_type == CMD_IOCTL_PEND) {
1356                                         c->cmd_type = CMD_IOCTL_DONE;
1357                                 }
1358                                 continue;
1359                         }
1360                 }
1361         }
1362
1363         /*
1364          * See if we can queue up some more IO
1365          */
1366         do_cciss_request(BLK_DEFAULT_QUEUE(MAJOR_NR + h->ctlr));
1367         spin_unlock_irqrestore(CCISS_LOCK(h->ctlr), flags);
1368 }
1369 /* 
1370  *  We cannot read the structure directly, for portablity we must use 
1371  *   the io functions.
1372  *   This is for debug only. 
1373  */
1374 #ifdef CCISS_DEBUG
1375 static void print_cfg_table( CfgTable_struct *tb)
1376 {
1377         int i;
1378         char temp_name[17];
1379
1380         printk("Controller Configuration information\n");
1381         printk("------------------------------------\n");
1382         for(i=0;i<4;i++)
1383                 temp_name[i] = readb(&(tb->Signature[i]));
1384         temp_name[4]='\0';
1385         printk("   Signature = %s\n", temp_name); 
1386         printk("   Spec Number = %d\n", readl(&(tb->SpecValence)));
1387         printk("   Transport methods supported = 0x%x\n", 
1388                                 readl(&(tb-> TransportSupport)));
1389         printk("   Transport methods active = 0x%x\n", 
1390                                 readl(&(tb->TransportActive)));
1391         printk("   Requested transport Method = 0x%x\n", 
1392                         readl(&(tb->HostWrite.TransportRequest)));
1393         printk("   Coalese Interrupt Delay = 0x%x\n", 
1394                         readl(&(tb->HostWrite.CoalIntDelay)));
1395         printk("   Coalese Interrupt Count = 0x%x\n", 
1396                         readl(&(tb->HostWrite.CoalIntCount)));
1397         printk("   Max outstanding commands = 0x%d\n", 
1398                         readl(&(tb->CmdsOutMax)));
1399         printk("   Bus Types = 0x%x\n", readl(&(tb-> BusTypes)));
1400         for(i=0;i<16;i++)
1401                 temp_name[i] = readb(&(tb->ServerName[i]));
1402         temp_name[16] = '\0';
1403         printk("   Server Name = %s\n", temp_name);
1404         printk("   Heartbeat Counter = 0x%x\n\n\n", 
1405                         readl(&(tb->HeartBeat)));
1406 }
1407 #endif /* CCISS_DEBUG */ 
1408
1409 static int cciss_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
1410 {
1411         ushort vendor_id, device_id, command;
1412         unchar cache_line_size, latency_timer;
1413         unchar irq, revision;
1414         uint addr[6];
1415         __u32 board_id;
1416         int cfg_offset;
1417         int cfg_base_addr;
1418         int cfg_base_addr_index;
1419         int i;
1420
1421         vendor_id = pdev->vendor;
1422         device_id = pdev->device;
1423         irq = pdev->irq;
1424
1425         for(i=0; i<6; i++)
1426                 addr[i] = pdev->resource[i].start;
1427
1428         if (pci_enable_device(pdev))
1429         {
1430                 printk(KERN_ERR "cciss: Unable to Enable PCI device\n");
1431                 return( -1);
1432         }
1433         if (pci_set_dma_mask(pdev, CCISS_DMA_MASK ) != 0)
1434         {
1435                 printk(KERN_ERR "cciss:  Unable to set DMA mask\n");
1436                 return(-1);
1437         }
1438         
1439         (void) pci_read_config_word(pdev, PCI_COMMAND,&command);
1440         (void) pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
1441         (void) pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE,
1442                                                 &cache_line_size);
1443         (void) pci_read_config_byte(pdev, PCI_LATENCY_TIMER,
1444                                                 &latency_timer);
1445
1446         (void) pci_read_config_dword(pdev, PCI_SUBSYSTEM_VENDOR_ID, 
1447                                                 &board_id);
1448
1449 #ifdef CCISS_DEBUG
1450         printk("vendor_id = %x\n", vendor_id);
1451         printk("device_id = %x\n", device_id);
1452         printk("command = %x\n", command);
1453         for(i=0; i<6; i++)
1454                 printk("addr[%d] = %x\n", i, addr[i]);
1455         printk("revision = %x\n", revision);
1456         printk("irq = %x\n", irq);
1457         printk("cache_line_size = %x\n", cache_line_size);
1458         printk("latency_timer = %x\n", latency_timer);
1459         printk("board_id = %x\n", board_id);
1460 #endif /* CCISS_DEBUG */ 
1461
1462         c->intr = irq;
1463
1464         /*
1465          * Memory base addr is first addr , the second points to the config
1466          *   table
1467          */
1468
1469         c->paddr = addr[0] & 0xfffffff0; /* remove the addressing mode bits */
1470 #ifdef CCISS_DEBUG
1471         printk("address 0 = %x\n", c->paddr);
1472 #endif /* CCISS_DEBUG */ 
1473         c->vaddr = remap_pci_mem(c->paddr, 200);
1474
1475         /* get the address index number */
1476         cfg_base_addr = readl(c->vaddr + SA5_CTCFG_OFFSET);
1477         /* I am not prepared to deal with a 64 bit address value */
1478         cfg_base_addr &= 0xffff;
1479 #ifdef CCISS_DEBUG
1480         printk("cfg base address = %x\n", cfg_base_addr);
1481 #endif /* CCISS_DEBUG */
1482         cfg_base_addr_index = (cfg_base_addr  - PCI_BASE_ADDRESS_0)/4;
1483 #ifdef CCISS_DEBUG
1484         printk("cfg base address index = %x\n", cfg_base_addr_index);
1485 #endif /* CCISS_DEBUG */
1486
1487         cfg_offset = readl(c->vaddr + SA5_CTMEM_OFFSET);
1488 #ifdef CCISS_DEBUG
1489         printk("cfg offset = %x\n", cfg_offset);
1490 #endif /* CCISS_DEBUG */
1491         c->cfgtable = (CfgTable_struct *) 
1492                 remap_pci_mem((addr[cfg_base_addr_index] & 0xfffffff0)
1493                                 + cfg_offset, sizeof(CfgTable_struct));
1494         c->board_id = board_id;
1495
1496 #ifdef CCISS_DEBUG
1497         print_cfg_table(c->cfgtable); 
1498 #endif /* CCISS_DEBUG */
1499
1500         for(i=0; i<NR_PRODUCTS; i++) {
1501                 if (board_id == products[i].board_id) {
1502                         c->product_name = products[i].product_name;
1503                         c->access = *(products[i].access);
1504                         break;
1505                 }
1506         }
1507         if (i == NR_PRODUCTS) {
1508                 printk(KERN_WARNING "cciss: Sorry, I don't know how"
1509                         " to access the Smart Array controller %08lx\n", 
1510                                 (unsigned long)board_id);
1511                 return -1;
1512         }
1513         if (  (readb(&c->cfgtable->Signature[0]) != 'C') ||
1514               (readb(&c->cfgtable->Signature[1]) != 'I') ||
1515               (readb(&c->cfgtable->Signature[2]) != 'S') ||
1516               (readb(&c->cfgtable->Signature[3]) != 'S') )
1517         {
1518                 printk("Does not appear to be a valid CISS config table\n");
1519                 return -1;
1520         }
1521 #ifdef CCISS_DEBUG
1522         printk("Trying to put board into Simple mode\n");
1523 #endif /* CCISS_DEBUG */ 
1524         c->max_commands = readl(&(c->cfgtable->CmdsOutMax));
1525         /* Update the field, and then ring the doorbell */ 
1526         writel( CFGTBL_Trans_Simple, 
1527                 &(c->cfgtable->HostWrite.TransportRequest));
1528         writel( CFGTBL_ChangeReq, c->vaddr + SA5_DOORBELL);
1529
1530         for(i=0;i<MAX_CONFIG_WAIT;i++)
1531         {
1532                 if (!(readl(c->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1533                         break;
1534                 /* delay and try again */
1535                 udelay(1000);
1536         }       
1537
1538 #ifdef CCISS_DEBUG
1539         printk(KERN_DEBUG "I counter got to %d %x\n", i, readl(c->vaddr + SA5_DOORBELL));
1540 #endif /* CCISS_DEBUG */
1541 #ifdef CCISS_DEBUG
1542         print_cfg_table(c->cfgtable);   
1543 #endif /* CCISS_DEBUG */ 
1544
1545         if (!(readl(&(c->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
1546         {
1547                 printk(KERN_WARNING "cciss: unable to get board into"
1548                                         " simple mode\n");
1549                 return -1;
1550         }
1551         return 0;
1552
1553 }
1554
1555 /* 
1556  * Gets information about the local volumes attached to the controller. 
1557  */ 
1558 static void cciss_getgeometry(int cntl_num)
1559 {
1560         ReportLunData_struct *ld_buff;
1561         ReadCapdata_struct *size_buff;
1562         InquiryData_struct *inq_buff;
1563         int return_code;
1564         int i;
1565         int listlength = 0;
1566         int lunid = 0;
1567         int block_size;
1568         int total_size; 
1569
1570         ld_buff = kmalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
1571         if (ld_buff == NULL)
1572         {
1573                 printk(KERN_ERR "cciss: out of memory\n");
1574                 return;
1575         }
1576         memset(ld_buff, 0, sizeof(ReportLunData_struct));
1577         size_buff = kmalloc(sizeof( ReadCapdata_struct), GFP_KERNEL);
1578         if (size_buff == NULL)
1579         {
1580                 printk(KERN_ERR "cciss: out of memory\n");
1581                 kfree(ld_buff);
1582                 return;
1583         }
1584         inq_buff = kmalloc(sizeof( InquiryData_struct), GFP_KERNEL);
1585         if (inq_buff == NULL)
1586         {
1587                 printk(KERN_ERR "cciss: out of memory\n");
1588                 kfree(ld_buff);
1589                 kfree(size_buff);
1590                 return;
1591         }
1592         /* Get the firmware version */ 
1593         return_code = sendcmd(CISS_INQUIRY, cntl_num, inq_buff, 
1594                 sizeof(InquiryData_struct), 0, 0 ,0 );
1595         if (return_code == IO_OK)
1596         {
1597                 hba[cntl_num]->firm_ver[0] = inq_buff->data_byte[32];
1598                 hba[cntl_num]->firm_ver[1] = inq_buff->data_byte[33];
1599                 hba[cntl_num]->firm_ver[2] = inq_buff->data_byte[34];
1600                 hba[cntl_num]->firm_ver[3] = inq_buff->data_byte[35];
1601         } else /* send command failed */
1602         {
1603                 printk(KERN_WARNING "cciss: unable to determine firmware"
1604                         " version of controller\n");
1605         }
1606         /* Get the number of logical volumes */ 
1607         return_code = sendcmd(CISS_REPORT_LOG, cntl_num, ld_buff, 
1608                         sizeof(ReportLunData_struct), 0, 0, 0 );
1609
1610         if( return_code == IO_OK)
1611         {
1612 #ifdef CCISS_DEBUG
1613                 printk("LUN Data\n--------------------------\n");
1614 #endif /* CCISS_DEBUG */ 
1615
1616                 listlength |= (0xff & (unsigned int)(ld_buff->LUNListLength[0])) << 24;
1617                 listlength |= (0xff & (unsigned int)(ld_buff->LUNListLength[1])) << 16;
1618                 listlength |= (0xff & (unsigned int)(ld_buff->LUNListLength[2])) << 8;  
1619                 listlength |= 0xff & (unsigned int)(ld_buff->LUNListLength[3]);
1620         } else /* reading number of logical volumes failed */
1621         {
1622                 printk(KERN_WARNING "cciss: report logical volume"
1623                         " command failed\n");
1624                 listlength = 0;
1625         }
1626         hba[cntl_num]->num_luns = listlength / 8; // 8 bytes pre entry
1627         if (hba[cntl_num]->num_luns > CISS_MAX_LUN)
1628         {
1629                 printk(KERN_ERR "ciss:  only %d number of logical volumes supported\n",
1630                         CISS_MAX_LUN);
1631                 hba[cntl_num]->num_luns = CISS_MAX_LUN;
1632         }
1633 #ifdef CCISS_DEBUG
1634         printk(KERN_DEBUG "Length = %x %x %x %x = %d\n", ld_buff->LUNListLength[0],
1635                 ld_buff->LUNListLength[1], ld_buff->LUNListLength[2],
1636                 ld_buff->LUNListLength[3],  hba[cntl_num]->num_luns);
1637 #endif /* CCISS_DEBUG */
1638         for(i=0; i<  hba[cntl_num]->num_luns ; i++)
1639         {
1640                 lunid = (0xff & (unsigned int)(ld_buff->LUN[i][3])) << 24;
1641                 lunid |= (0xff & (unsigned int)(ld_buff->LUN[i][2])) << 16;
1642                 lunid |= (0xff & (unsigned int)(ld_buff->LUN[i][1])) << 8;
1643                 lunid |= 0xff & (unsigned int)(ld_buff->LUN[i][0]);
1644                 hba[cntl_num]->drv[i].LunID = lunid;
1645
1646 #ifdef CCISS_DEBUG
1647                 printk(KERN_DEBUG "LUN[%d]:  %x %x %x %x = %x\n", i, 
1648                 ld_buff->LUN[i][0], ld_buff->LUN[i][1],ld_buff->LUN[i][2], 
1649                 ld_buff->LUN[i][3], hba[cntl_num]->drv[i].LunID);
1650 #endif /* CCISS_DEBUG */
1651
1652                 memset(size_buff, 0, sizeof(ReadCapdata_struct));
1653                 return_code = sendcmd(CCISS_READ_CAPACITY, cntl_num, size_buff, 
1654                                 sizeof( ReadCapdata_struct), 1, i, 0 );
1655                 if (return_code == IO_OK)
1656                 {
1657                         total_size = (0xff & 
1658                                 (unsigned int)(size_buff->total_size[0])) << 24;
1659                         total_size |= (0xff & 
1660                                 (unsigned int)(size_buff->total_size[1])) << 16;
1661                         total_size |= (0xff & 
1662                                 (unsigned int)(size_buff->total_size[2])) << 8;
1663                         total_size |= (0xff & (unsigned int)
1664                                 (size_buff->total_size[3])); 
1665                         total_size++; // command returns highest block address
1666
1667                         block_size = (0xff & 
1668                                 (unsigned int)(size_buff->block_size[0])) << 24;
1669                         block_size |= (0xff & 
1670                                 (unsigned int)(size_buff->block_size[1])) << 16;
1671                         block_size |= (0xff & 
1672                                 (unsigned int)(size_buff->block_size[2])) << 8;
1673                         block_size |= (0xff & 
1674                                 (unsigned int)(size_buff->block_size[3]));
1675                 } else /* read capacity command failed */ 
1676                 {
1677                         printk(KERN_WARNING "cciss: read capacity failed\n");
1678                         total_size = block_size = 0; 
1679                 }       
1680                 printk(KERN_INFO "      blocks= %d block_size= %d\n", 
1681                                         total_size, block_size);
1682
1683                 /* Execute the command to read the disk geometry */
1684                 memset(inq_buff, 0, sizeof(InquiryData_struct));
1685                 return_code = sendcmd(CISS_INQUIRY, cntl_num, inq_buff,
1686                         sizeof(InquiryData_struct), 1, i ,0xC1 );
1687                 if (return_code == IO_OK)
1688                 {
1689                         if(inq_buff->data_byte[8] == 0xFF)
1690                         {
1691                            printk(KERN_WARNING "cciss: reading geometry failed, volume does not support reading geometry\n");
1692
1693                            hba[cntl_num]->drv[i].block_size = block_size;
1694                            hba[cntl_num]->drv[i].nr_blocks = total_size;
1695                            hba[cntl_num]->drv[i].heads = 255;
1696                            hba[cntl_num]->drv[i].sectors = 32; // Sectors per track
1697                            hba[cntl_num]->drv[i].cylinders = total_size / 255 / 32;                     } else
1698                         {
1699
1700                            hba[cntl_num]->drv[i].block_size = block_size;
1701                            hba[cntl_num]->drv[i].nr_blocks = total_size;
1702                            hba[cntl_num]->drv[i].heads = 
1703                                         inq_buff->data_byte[6]; 
1704                            hba[cntl_num]->drv[i].sectors = 
1705                                         inq_buff->data_byte[7]; 
1706                            hba[cntl_num]->drv[i].cylinders = 
1707                                         (inq_buff->data_byte[4] & 0xff) << 8;
1708                            hba[cntl_num]->drv[i].cylinders += 
1709                                         inq_buff->data_byte[5];
1710                         }
1711                 }
1712                 else /* Get geometry failed */
1713                 {
1714                         printk(KERN_WARNING "cciss: reading geometry failed, continuing with default geometry\n"); 
1715
1716                         hba[cntl_num]->drv[i].block_size = block_size;
1717                         hba[cntl_num]->drv[i].nr_blocks = total_size;
1718                         hba[cntl_num]->drv[i].heads = 255;
1719                         hba[cntl_num]->drv[i].sectors = 32; // Sectors per track 
1720                         hba[cntl_num]->drv[i].cylinders = total_size / 255 / 32;
1721                 }
1722                 printk(KERN_INFO "      heads= %d, sectors= %d, cylinders= %d\n\n",
1723                         hba[cntl_num]->drv[i].heads, 
1724                         hba[cntl_num]->drv[i].sectors,
1725                         hba[cntl_num]->drv[i].cylinders);
1726
1727         }
1728         kfree(ld_buff);
1729         kfree(size_buff);
1730 }       
1731
1732 /* Function to find the first free pointer into our hba[] array */
1733 /* Returns -1 if no free entries are left.  */
1734 static int alloc_cciss_hba(void)
1735 {
1736         int i;
1737         for(i=0; i< MAX_CTLR; i++)
1738         {
1739                 if (hba[i] == NULL)
1740                 {
1741                         hba[i] = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL);
1742                         if(hba[i]==NULL)
1743                         {
1744                                 printk(KERN_ERR "cciss: out of memory.\n");
1745                                 return (-1);
1746                         }
1747                         return (i);
1748                 }
1749         }
1750         printk(KERN_WARNING "cciss: This driver supports a maximum"
1751                 " of 8 controllers.\n");
1752         return(-1);
1753 }
1754
1755 static void free_hba(int i)
1756 {
1757         kfree(hba[i]);
1758         hba[i]=NULL;
1759 }
1760
1761 /*
1762  *  This is it.  Find all the controllers and register them.  I really hate
1763  *  stealing all these major device numbers.
1764  *  returns the number of block devices registered.
1765  */
1766 static int __init cciss_init_one(struct pci_dev *pdev,
1767         const struct pci_device_id *ent)
1768 {
1769         request_queue_t *q;
1770         int i;
1771         int j;
1772
1773         printk(KERN_DEBUG "cciss: Device 0x%x has been found at"
1774                         " bus %d dev %d func %d\n",
1775                 pdev->device, pdev->bus->number, PCI_SLOT(pdev->devfn),
1776                         PCI_FUNC(pdev->devfn));
1777         i = alloc_cciss_hba();
1778         if( i < 0 ) 
1779                 return (-1);
1780         memset(hba[i], 0, sizeof(ctlr_info_t));
1781         if (cciss_pci_init(hba[i], pdev) != 0)
1782         {
1783                 free_hba(i);
1784                 return (-1);
1785         }
1786         sprintf(hba[i]->devname, "cciss%d", i);
1787         hba[i]->ctlr = i;
1788         hba[i]->pdev = pdev;
1789
1790         /* configure PCI DMA stuff */
1791         if (!pci_set_dma_mask(pdev, (u64) 0xffffffffffffffff))
1792                 printk("cciss: using DAC cycles\n");
1793         else if (!pci_set_dma_mask(pdev, 0xffffffff))
1794                 printk("cciss: not using DAC cycles\n");
1795         else {
1796                 printk("cciss: no suitable DMA available\n");
1797                 free_hba(i);
1798                 return -ENODEV;
1799         }
1800
1801         if( register_blkdev(MAJOR_NR+i, hba[i]->devname, &cciss_fops))
1802         {
1803                 printk(KERN_ERR "cciss:  Unable to get major number "
1804                         "%d for %s\n", MAJOR_NR+i, hba[i]->devname);
1805                 free_hba(i);
1806                 return(-1);
1807         }
1808         /* make sure the board interrupts are off */
1809         hba[i]->access.set_intr_mask(hba[i], CCISS_INTR_OFF);
1810         if( request_irq(hba[i]->intr, do_cciss_intr, 
1811                 SA_INTERRUPT|SA_SHIRQ, hba[i]->devname, hba[i]))
1812         {
1813                 printk(KERN_ERR "ciss: Unable to get irq %d for %s\n",
1814                         hba[i]->intr, hba[i]->devname);
1815                 unregister_blkdev( MAJOR_NR+i, hba[i]->devname);
1816                 free_hba(i);
1817                 return(-1);
1818         }
1819         hba[i]->cmd_pool_bits = (__u32*)kmalloc(
1820                 ((NR_CMDS+31)/32)*sizeof(__u32), GFP_KERNEL);
1821         hba[i]->cmd_pool = (CommandList_struct *)pci_alloc_consistent(
1822                 hba[i]->pdev, NR_CMDS * sizeof(CommandList_struct), 
1823                 &(hba[i]->cmd_pool_dhandle));
1824         hba[i]->errinfo_pool = (ErrorInfo_struct *)pci_alloc_consistent(
1825                 hba[i]->pdev, NR_CMDS * sizeof( ErrorInfo_struct), 
1826                 &(hba[i]->errinfo_pool_dhandle));
1827         if((hba[i]->cmd_pool_bits == NULL) 
1828                 || (hba[i]->cmd_pool == NULL)
1829                 || (hba[i]->errinfo_pool == NULL))
1830         {
1831                 if(hba[i]->cmd_pool_bits)
1832                         kfree(hba[i]->cmd_pool_bits);
1833                 if(hba[i]->cmd_pool)
1834                         pci_free_consistent(hba[i]->pdev,  
1835                                 NR_CMDS * sizeof(CommandList_struct), 
1836                                 hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);    
1837                 if(hba[i]->errinfo_pool)
1838                         pci_free_consistent(hba[i]->pdev,
1839                                 NR_CMDS * sizeof( ErrorInfo_struct),
1840                                 hba[i]->errinfo_pool, 
1841                                 hba[i]->errinfo_pool_dhandle);
1842                 free_irq(hba[i]->intr, hba[i]);
1843                 unregister_blkdev(MAJOR_NR+i, hba[i]->devname);
1844                 free_hba(i);
1845                 printk( KERN_ERR "cciss: out of memory");
1846                 return(-1);
1847         }
1848
1849         /* Initialize the pdev driver private data. 
1850                 have it point to hba[i].  */
1851         pci_set_drvdata(pdev, hba[i]);
1852         /* command and error info recs zeroed out before 
1853                         they are used */
1854         memset(hba[i]->cmd_pool_bits, 0, ((NR_CMDS+31)/32)*sizeof(__u32));
1855
1856 #ifdef CCISS_DEBUG      
1857         printk(KERN_DEBUG "Scanning for drives on controller cciss%d\n",i);
1858 #endif /* CCISS_DEBUG */
1859
1860         cciss_getgeometry(i);
1861
1862         /* Turn the interrupts on so we can service requests */
1863         hba[i]->access.set_intr_mask(hba[i], CCISS_INTR_ON);
1864
1865         cciss_procinit(i);
1866
1867         q = BLK_DEFAULT_QUEUE(MAJOR_NR + i);
1868         q->queuedata = hba[i];
1869         blk_init_queue(q, do_cciss_request);
1870         blk_queue_bounce_limit(q, hba[i]->pdev->dma_mask);
1871         blk_queue_max_segments(q, MAXSGENTRIES);
1872         blk_queue_max_sectors(q, 512);
1873
1874         /* fill in the other Kernel structs */
1875         blksize_size[MAJOR_NR+i] = hba[i]->blocksizes;
1876         read_ahead[MAJOR_NR+i] = READ_AHEAD;
1877
1878         /* Fill in the gendisk data */  
1879         hba[i]->gendisk.major = MAJOR_NR + i;
1880         hba[i]->gendisk.major_name = "cciss";
1881         hba[i]->gendisk.minor_shift = NWD_SHIFT;
1882         hba[i]->gendisk.max_p = MAX_PART;
1883         hba[i]->gendisk.part = hba[i]->hd;
1884         hba[i]->gendisk.sizes = hba[i]->sizes;
1885         hba[i]->gendisk.nr_real = hba[i]->num_luns;
1886
1887         /* Get on the disk list */ 
1888         add_gendisk(&(hba[i]->gendisk));
1889
1890         cciss_geninit(i);
1891         for(j=0; j<NWD; j++)
1892                 register_disk(&(hba[i]->gendisk),
1893                         MKDEV(MAJOR_NR+i, j <<4), 
1894                         MAX_PART, &cciss_fops, 
1895                         hba[i]->drv[j].nr_blocks);
1896
1897         return(1);
1898 }
1899
1900 static void __devexit cciss_remove_one (struct pci_dev *pdev)
1901 {
1902         ctlr_info_t *tmp_ptr;
1903         int i;
1904
1905         if (pci_get_drvdata(pdev) == NULL)
1906         {
1907                 printk( KERN_ERR "cciss: Unable to remove device \n");
1908                 return;
1909         }
1910         tmp_ptr = pci_get_drvdata(pdev);
1911         i = tmp_ptr->ctlr;
1912         if (hba[i] == NULL) 
1913         {
1914                 printk(KERN_ERR "cciss: device appears to "
1915                         "already be removed \n");
1916                 return;
1917         }
1918         /* Turn board interrupts off */
1919         hba[i]->access.set_intr_mask(hba[i], CCISS_INTR_OFF);
1920         free_irq(hba[i]->intr, hba[i]);
1921         pci_set_drvdata(pdev, NULL);
1922         iounmap((void*)hba[i]->vaddr);
1923         unregister_blkdev(MAJOR_NR+i, hba[i]->devname);
1924         remove_proc_entry(hba[i]->devname, proc_cciss); 
1925         
1926         /* remove it from the disk list */
1927         del_gendisk(&(hba[i]->gendisk));
1928
1929         pci_free_consistent(hba[i]->pdev, NR_CMDS * sizeof(CommandList_struct),
1930                             hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
1931         pci_free_consistent(hba[i]->pdev, NR_CMDS * sizeof( ErrorInfo_struct),
1932                 hba[i]->errinfo_pool, hba[i]->errinfo_pool_dhandle);
1933         kfree(hba[i]->cmd_pool_bits);
1934         free_hba(i);
1935 }       
1936
1937 static struct pci_driver cciss_pci_driver = {
1938         name:           "cciss",
1939         probe:          cciss_init_one,
1940         remove:         cciss_remove_one,
1941         id_table:       cciss_pci_device_id, /* id_table */
1942 };
1943
1944 /*
1945  *  This is it.  Register the PCI driver information for the cards we control
1946  *  the OS will call our registered routines when it finds one of our cards. 
1947  */
1948 int __init cciss_init(void)
1949 {
1950         printk(KERN_INFO DRIVER_NAME "\n");
1951
1952         /* Register for out PCI devices */
1953         if (pci_register_driver(&cciss_pci_driver) > 0 )
1954                 return 0;
1955         else 
1956                 return -ENODEV;
1957
1958 }
1959
1960 EXPORT_NO_SYMBOLS;
1961 static int __init init_cciss_module(void)
1962 {
1963         return ( cciss_init());
1964 }
1965
1966 static void __exit cleanup_cciss_module(void)
1967 {
1968         int i;
1969
1970         pci_unregister_driver(&cciss_pci_driver);
1971         /* double check that all controller entrys have been removed */
1972         for (i=0; i< MAX_CTLR; i++) 
1973         {
1974                 if (hba[i] != NULL)
1975                 {
1976                         printk(KERN_WARNING "cciss: had to remove"
1977                                         " controller %d\n", i);
1978                         cciss_remove_one(hba[i]->pdev);
1979                 }
1980         }
1981         remove_proc_entry("cciss", proc_root_driver);
1982 }
1983
1984 module_init(init_cciss_module);
1985 module_exit(cleanup_cciss_module);